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公开(公告)号：US20110043318A1
公开(公告)日：2011-02-24
申请号：US12939945
申请日：2010-11-04
申请人： GERHARD SCHROM , DONALD GARDNER , PETER HAZUCHA , FABRICE PAILLET , TANAY KARNIK
发明人： GERHARD SCHROM , DONALD GARDNER , PETER HAZUCHA , FABRICE PAILLET , TANAY KARNIK
CPC分类号： H01F17/0006 , H01F3/00 , H01F27/34 , H01F2017/0066
摘要： An apparatus includes a magnetic core, a ground node, and one or more vias to provide a connection between the magnetic core and the ground potential. The magnetic core includes a first magnetic layer and a second magnetic layer. In addition, the apparatus may include a conductive pattern. The conductive pattern may be at a third layer between the first and second magnetic layers. The apparatus may be included in inductors, transformers, transmission lines, and other components using ferromagnetic cores or shields. Such components may be integrated on a chip or die.
摘要翻译： 一种装置包括磁芯，接地节点和一个或多个通孔，以提供磁芯和地电位之间的连接。 磁芯包括第一磁性层和第二磁性层。 另外，该装置可以包括导电图案。 导电图案可以在第一和第二磁性层之间的第三层。 该装置可以包括在使用铁磁芯或屏蔽的电感器，变压器，传输线和其它部件中。 这样的部件可以集成在芯片或芯片上。
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62.发明授权Forming inductor and transformer structures with magnetic materials using damascene processing for integrated circuits 有权使用集成电路的镶嵌处理形成具有磁性材料的电感器和变压器结构公开(公告)号：US07867787B2
公开(公告)日：2011-01-11
申请号：US11968122
申请日：2007-12-31
IPC分类号： H01L21/00 , H01L21/338 , H01L21/8238 , H01L21/8222 , H01L21/461
CPC分类号： H01L23/5227 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.
摘要翻译： 描述形成微电子器件的方法和相关结构。 这些方法可以包括形成磁性材料的第一层和设置在第一介电层中的至少一个通孔结构，形成设置在第一磁性层上的第二介电层，形成设置在第二介电层中的至少一个导电结构，形成 设置在所述导电结构上的第三层电介质材料，形成设置在所述第三介电材料层中和所述第二介电材料层中的第二层磁性材料，其中所述磁性材料的第一和第二层与一个 另一个。
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63.发明申请FORMING INDUCTOR AND TRANSFORMER STRUCTURES WITH MAGNETIC MATERIALS USING DAMASCENE PROCESSING FOR INTEGRATED CIRCUITS 有权使用大容量加工的集成电路形成电感器和具有磁性材料的变压器结构公开(公告)号：US20110001202A1
公开(公告)日：2011-01-06
申请号：US12882529
申请日：2010-09-15
IPC分类号： H01L29/82
CPC分类号： H01L23/5227 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.
摘要翻译： 描述形成微电子器件的方法和相关结构。 这些方法可以包括形成磁性材料的第一层和设置在第一介电层中的至少一个通孔结构，形成设置在第一磁性层上的第二介电层，形成设置在第二介电层中的至少一个导电结构，形成 设置在所述导电结构上的第三层电介质材料，形成设置在所述第三介电材料层中和所述第二介电材料层中的第二层磁性材料，其中所述磁性材料的第一和第二层与一个 另一个。
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公开(公告)号：US20100118501A1
公开(公告)日：2010-05-13
申请号：US12590112
申请日：2009-11-03
申请人： Peter Hazucha , Edward Burton , Trang T. Nguyen , Gerhard Schrom , Fabrice Paillet , Kaladhar Radhakrishnan , Donald S. Gardner , Sung T. Moon , Tanay Karnik
发明人： Peter Hazucha , Edward Burton , Trang T. Nguyen , Gerhard Schrom , Fabrice Paillet , Kaladhar Radhakrishnan , Donald S. Gardner , Sung T. Moon , Tanay Karnik
CPC分类号： H05K1/165 , H01L23/645 , H01L2223/6677 , H01L2924/0002 , H01L2924/3011 , H05K1/0263 , H05K3/42 , H05K2201/09627 , H05K2201/09709 , H01L2924/00
摘要： An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.
摘要翻译： 本文提供了嵌入基板（例如IC封装基板，板基板和/或其他基板）中的电感器和多个电感器。
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公开(公告)号：US07636242B2
公开(公告)日：2009-12-22
申请号：US11479626
申请日：2006-06-29
申请人： Peter Hazucha , Edward Burton , Trang T. Nguyen , Gerhard Schrom , Fabrice Paillet , Kaladhar Radhakrishnan , Donald S. Gardner , Sung T. Moon , Tanay Karnik
发明人： Peter Hazucha , Edward Burton , Trang T. Nguyen , Gerhard Schrom , Fabrice Paillet , Kaladhar Radhakrishnan , Donald S. Gardner , Sung T. Moon , Tanay Karnik
IPC分类号： H05K1/18
CPC分类号： H05K1/165 , H01L23/645 , H01L2223/6677 , H01L2924/0002 , H01L2924/3011 , H05K1/0263 , H05K3/42 , H05K2201/09627 , H05K2201/09709 , H01L2924/00
摘要： An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.
摘要翻译： 本文提供了嵌入基板（例如IC封装基板，板基板和/或其他基板）中的电感器和多个电感器。
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公开(公告)号：US07602257B2
公开(公告)日：2009-10-13
申请号：US11641006
申请日：2006-12-19
申请人： Gerhard Schrom , Dinesh Somasekhar , Fabrice Paillet , Peter Hazucha , Sung Tae Moon , Tanay Karnik
发明人： Gerhard Schrom , Dinesh Somasekhar , Fabrice Paillet , Peter Hazucha , Sung Tae Moon , Tanay Karnik
IPC分类号： H03B27/00
CPC分类号： H03K5/151 , H03K3/0315 , H03K5/133 , H03K7/08 , H03K2005/00058 , H04L25/4902
摘要： A signal generating circuit is provided. The signal generating circuit may include a plurality of delay circuits coupled to provide a plurality of control signals, a weighted-sum circuit to receive the plurality of control signals and to provide an output analog signal, and a comparator circuit to compare the output analog signal with a voltage and to provide a pulse width modulated (PWM) signal based on the comparison.
摘要翻译： 提供信号发生电路。 信号发生电路可以包括耦合以提供多个控制信号的多个延迟电路，用于接收多个控制信号并提供输出模拟信号的加权和电路，以及比较器电路，用于比较输出模拟信号 并提供基于比较的脉宽调制（PWM）信号。
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公开(公告)号：US20090207576A1
公开(公告)日：2009-08-20
申请号：US12406512
申请日：2009-03-18
CPC分类号： H01F17/0006 , H01F10/132 , H01F10/16 , H01F41/34 , H01F2017/0053 , H01F2017/0066 , H01L23/5227 , H01L2924/0002 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： An embodiment is an inductor that may include a slotted magnetic material to decrease eddy currents therein that may limit the operation of the inductor at high frequency. An embodiment may employ electro- or electroless plating techniques to form a layer or layers of magnetic material within the slotted magnetic material structure, and in particular those magnetic material layers adjacent to insulator layers.
摘要翻译： 一个实施例是可以包括开槽磁性材料以减少其中的涡流的电感器，其可以限制高频下的电感器的操作。 一个实施例可以采用电镀或无电镀技术在开槽磁性材料结构内形成一层或多层磁性材料，特别是与绝缘体层相邻的那些磁性材料层。
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公开(公告)号：US20090174377A1
公开(公告)日：2009-07-09
申请号：US12405136
申请日：2009-03-16
申请人： Gerhard Schrom , Peter Hazucha , Jaeseo Lee , Fabrice Paillet , Tanay Karnik , Vivek De
发明人： Gerhard Schrom , Peter Hazucha , Jaeseo Lee , Fabrice Paillet , Tanay Karnik , Vivek De
IPC分类号： G05F1/00
摘要： A multiphase DC-DC converter is provided that includes a multiphase transformer, the multiphase transformer including a plurality of input voltage terminals and an transformer output voltage terminal, each input voltage terminal associated with a corresponding phase. Each phase is assigned to an input voltage terminal of the plurality of input voltage terminals to minimize a ripple current at the input voltage terminals of the multiphase transformer.
摘要翻译： 提供了一种包括多相变压器的多相DC-DC转换器，多相变压器包括多个输入电压端子和变压器输出电压端子，每个输入电压端子与相应的相位相关联。 将各相分配给多个输入电压端子的输入电压端子，以使多相变压器的输入电压端子处的纹波电流最小化。
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69.发明申请FORMING INDUCTOR AND TRANSFORMER STRUCTURES WITH MAGNETIC MATERIALS USING DAMASCENE PROCESSING FOR INTEGRATED CIRCUITS 有权使用大容量加工的集成电路形成电感器和具有磁性材料的变压器结构公开(公告)号：US20090166804A1
公开(公告)日：2009-07-02
申请号：US11968122
申请日：2007-12-31
CPC分类号： H01L23/5227 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.
摘要翻译： 描述了形成微电子器件的方法和相关结构。 这些方法可以包括形成磁性材料的第一层和设置在第一介电层中的至少一个通孔结构，形成设置在第一磁性层上的第二介电层，形成设置在第二介电层中的至少一个导电结构，形成 设置在所述导电结构上的第三层电介质材料，形成设置在所述第三介电材料层中和所述第二介电材料层中的第二层磁性材料，其中所述磁性材料的第一和第二层与一个 另一个。
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公开(公告)号：US20080238596A1
公开(公告)日：2008-10-02
申请号：US11694812
申请日：2007-03-30
申请人： GERHARD SCHROM , DONALD GARDNER , PETER HAZUCHA , FABRICE PAILLET , TANAY KARNIK
发明人： GERHARD SCHROM , DONALD GARDNER , PETER HAZUCHA , FABRICE PAILLET , TANAY KARNIK
IPC分类号： H01F3/00
CPC分类号： H01F17/0006 , H01F3/00 , H01F27/34 , H01F2017/0066
摘要： An apparatus includes a magnetic core, a ground node, and one or more vias to provide a connection between the magnetic core and the ground potential. The magnetic core includes a first magnetic layer and a second magnetic layer. In addition, the apparatus may include a conductive pattern. The conductive pattern may be at a third layer between the first and second magnetic layers. The apparatus may be included in inductors, transformers, transmission lines, and other components using ferromagnetic cores or shields. Such components may be integrated on a chip or die.
摘要翻译： 一种装置包括磁芯，接地节点和一个或多个通孔，以提供磁芯和地电位之间的连接。 磁芯包括第一磁性层和第二磁性层。 另外，该装置可以包括导电图案。 导电图案可以在第一和第二磁性层之间的第三层。 该装置可以包括在使用铁磁芯或屏蔽的电感器，变压器，传输线和其它部件中。 这样的部件可以集成在芯片或芯片上。
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