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68 条记录 (耗时 0.034 秒)

    Lamp and method of manufacturing the same
    63.
    发明授权
    Lamp and method of manufacturing the same 有权
    灯和制造方法相同

    公开(公告)号：US07122964B2

    公开(公告)日：2006-10-17

    申请号：US10495293

    申请日：2002-04-22

    申请人： Jae-Ho Jung ,  Keun-Woo Lee ,  Jong-Dae Park ,  Hyeong-Suk Yoo ,  Moon-Shik Kang ,  Sang-Hyuck Youn ,  Kyu-Seok Kim ,  Jeong-Hwan Lee

    发明人： Jae-Ho Jung ,  Keun-Woo Lee ,  Jong-Dae Park ,  Hyeong-Suk Yoo ,  Moon-Shik Kang ,  Sang-Hyuck Youn ,  Kyu-Seok Kim ,  Jeong-Hwan Lee

    IPC分类号： H01J11/00 ,  H01J65/00

    CPC分类号： H01J9/02 ,  H01J9/247 ,  H01J61/06 ,  H01J65/00

    摘要： In a lamp and method for fabricating the same, an outer surface of the lamp tube is dipped into a conductive transparent solution for forming an electrode by a predetermined depth, and then the lamp tube is pulled out from the solution. Accordingly, an electrode having different profiles is formed on the outer surface of the tube body. Also, the outer surface of the lamp tube is dipped into the solution by an acute angle, and is pulled out from the solution. Therefore, a problem of a nonuniform brightness between lamps is not generated, and light utilization efficiency is much enhanced even when using a plurality of lamp in parallel connected to a power supply.

    摘要翻译： 在一种灯及其制造方法中，将灯管的外表面浸入用于形成电极的导电性透明溶液预定深度，然后将灯管从溶液中拉出。 因此，在管体的外表面上形成具有不同型材的电极。 此外，灯管的外表面以锐角浸入溶液中，并从溶液中拉出。 因此，不会产生灯之间的不均匀亮度的问题，即使在使用与电源并联连接的多个灯时，光利用效率大大提高。

    Lamp fixing holder and back light assembly having the same
    65.
    发明申请
    Lamp fixing holder and back light assembly having the same 有权
    灯固定架和后灯组件具有相同的功能

    公开(公告)号：US20050248936A1

    公开(公告)日：2005-11-10

    申请号：US10519582

    申请日：2003-06-23

    申请人： Jeong-Hwan Lee ,  Jong-Dae Park ,  Young-il Kim ,  Chang-Young Bang ,  Tae-Jin Lee ,  Yong-Seok Choi ,  Jae-Ho Jung ,  Keun-Woo Lee ,  Jae-Sang Lee

    发明人： Jeong-Hwan Lee ,  Jong-Dae Park ,  Young-il Kim ,  Chang-Young Bang ,  Tae-Jin Lee ,  Yong-Seok Choi ,  Jae-Ho Jung ,  Keun-Woo Lee ,  Jae-Sang Lee

    IPC分类号： G02F1/13357 ,  F21V19/00 ,  F21S4/00

    CPC分类号： F21V19/009

    摘要： There is provided a lamp fixing holder. A lamp fixing holder for fixes a lamp to a receiving container. The lamp provides a liquid crystal display panel with light. The lamp includes a first portion of a face and a second portion of the face. The light emitted from the first portion of the face advances toward the liquid crystal display panel. The lamp fixing holder comprises a lamp fixing body and a fixing member. The lamp fixing body holds a third portion of the face of the lamp. The second portion includes the third portion. The fixing member fixes the lamp fixing body to the receiving container. The lamp fixing holder according to the present invention fixes the lamp so that the lamp does not sway, while minimizing an amount of light that is shielded by the lamp fixing holder.

    摘要翻译： 设有灯固定架。 一种用于将灯固定到接收容器的灯固定座。 该灯提供带有光的液晶显示面板。 灯包括面部的第一部分和面部的第二部分。 从面的第一部分发射的光朝向液晶显示面板前进。 灯固定架包括灯固定体和固定构件。 灯固定体保持灯的表面的第三部分。 第二部分包括第三部分。 固定构件将灯固定体固定到接收容器。 根据本发明的灯固定架固定灯，使得灯不会摇摆，同时使由灯固定夹持件遮蔽的光量最小化。

    Method of manufacturing a multi-level flash EEPROM cell
    67.
    发明授权
    Method of manufacturing a multi-level flash EEPROM cell 失效
    制造多级闪存EEPROM单元的方法

    公开(公告)号：US06821850B2

    公开(公告)日：2004-11-23

    申请号：US10627917

    申请日：2003-07-28

    申请人： Sang-Hoan Chang ,  Ki-Seog Kim ,  Keun-Woo Lee ,  Sung-Kee Park

    发明人： Sang-Hoan Chang ,  Ki-Seog Kim ,  Keun-Woo Lee ,  Sung-Kee Park

    IPC分类号： H02L21336

    CPC分类号： G11C11/5621 ,  G11C11/5628 ,  G11C16/0425 ,  G11C2211/5611

    摘要： A multi-level EEPROM cell and a method of manufacture thereof are provided so as to improve a program characteristic of the multi-level cell. For the purpose, the multi-level flash EEPROM cell includes a floating gate formed as being electrically separated from a silicon substrate by an underlying tunnel oxide layer, a first dielectric layer formed over the top of the floating gate, a first control gate formed on the floating gate as being electrically separated from the floating gate by the first dielectric layer, a second dielectric layer formed on the sidewall and top of the first control gate, a second control gate formed on the sidewall and top of the first control gate as being electrically separated from the first control gate by the second dielectric layer, and a source and drain formed in the substrate as being self-aligned with both edges of the second control gate.

    摘要翻译： 提供多级EEPROM单元及其制造方法，以改善多电平单元的程序特性。 为此，多级闪速EEPROM单元包括浮置栅极，其通过下面的隧道氧化物层与硅衬底电隔离，形成在浮置栅极的顶部上的第一电介质层，形成在第一控制栅极上的第一控制栅极 所述浮置栅极通过所述第一介电层与所述浮置栅极电分离，形成在所述第一控制栅极的侧壁和顶部上的第二介电层，形成在所述第一控制栅极的侧壁和顶部上的第二控制栅极为 通过第二电介质层与第一控制栅极电分离，以及在衬底中形成的与第二控制栅极的两个边缘自对准的源极和漏极。

    Test pattern for measuring contact resistance and method of manufacturing the same
    68.
    发明授权
    Test pattern for measuring contact resistance and method of manufacturing the same 失效
    用于测量接触电阻​​的测试图案及其制造方法

    公开(公告)号：US06734458B2

    公开(公告)日：2004-05-11

    申请号：US10029390

    申请日：2001-12-28

    申请人： Ki Seog Kim ,  Young Seon You ,  Keun Woo Lee ,  Sung Kee Park

    发明人： Ki Seog Kim ,  Young Seon You ,  Keun Woo Lee ,  Sung Kee Park

    IPC分类号： H01L2358

    CPC分类号： H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention relates to a test pattern for measuring a contact resistance and method of manufacturing the same. In order to confirm that a contact resistance suitable for a semiconductor device before an actual process for manufacturing the device is performed, the present invention designs a test pattern for measuring the contact resistance depending on a design rule of a line contact actually applied to an actual device. At this time, a first line contact region and a second line contact region are formed between a word line so that a line contact region can form a pair; a plurality of sources are formed in the first line contact region and a plurality of sources are formed in the second line contact region wherein neighboring sources are connected by diffusion layers so that the first line contact region and the second line contact region can be electrically connected; and a plurality of line contact patterns are formed so that the plurality of the sources can be electrically connected by every two in each of the first and second line contact regions wherein the line contact pattern formed in the first line contact region and the line contact pattern formed in the second line contact region are alternately positioned. Therefore, the present invention can allow current for measuring the resistance sequentially along the first line contact region and the second line contact region to measure the line contact resistance in which the contact resistance in every source portion is considered.

    摘要翻译： 本发明涉及一种测量接触电阻​​的测试图案及其制造方法。 为了确认在进行用于制造该器件的实际工艺之前适用于半导体器件的接触电阻，本发明根据实际应用于实际的线路接触的设计规则来设计用于测量接触电阻​​的测试图案 设备。 此时，在字线之间形成第一线接触区域和第二线路接触区域，使得线路接触区域可以形成一对; 多个源极形成在第一线路接触区域中，并且多个源极形成在第二线路接触区域中，其中相邻源极通过扩散层连接，使得第一线路接触区域和第二线路接触区域可以电连接 ; 并且形成多个线接触图案，使得多个源可以在形成在第一线接触区域中的线接触图案和线接触图案的第一和第二线路接触区域中的每一个中每两个电连接一次 形成在第二线接触区域中的交替位置。 因此，本发明可以允许沿着第一线路接触区域和第二线路接触区域依次测量电阻的电流来测量考虑到每个源极部分中的接触电阻的线路接触电阻。