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公开(公告)号：US12266613B2
公开(公告)日：2025-04-01
申请号：US17847330
申请日：2022-06-23
Inventor： Claire Laporte , Laurent Schwartz , Godfrey Dimayuga
IPC: H01L23/49 , H01L23/498 , H01L23/538 , H01L23/552
Abstract: A support substrate has a mounting face and a connection face opposite to the mounting face. An electronic chip is mounted to the mounting face and a matrix of connectors is mounted to the connection face. The support substrate includes an interconnection structure formed by a pair of conductive interconnection tracks that electrically connect the electronic chip to the matrix of connectors and circulate differential signals. The two interconnection tracks of the pair of conductive interconnection tracks extend facing each other at different depths of the support substrate. An isolation structure in the support substrate laterally isolates the pair of conductive interconnection tracks. Isolation plates above and below the pair of conductive interconnection tracks provide further isolation.
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公开(公告)号：US12253894B2
公开(公告)日：2025-03-18
申请号：US17884245
申请日：2022-08-09
Inventor： Alexandre Tramoni , Patrick Arnould
Abstract: The present disclosure relates to a method for powering an electronic device. The electronic device includes at least one universal integrated circuit card or at least one secure element; at least one power supply circuit for said card or secure element; and at least one near field communication module. When the near field communication module changes from a standby or inactive state to an active state, the following successive operations are performed: —the components and circuits of said electronic device are started; —programs of the electronic device and said secure card or element are started at the same time.
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63.发明公开公开(公告)号：US20240176863A1
公开(公告)日：2024-05-30
申请号：US18514795
申请日：2023-11-20
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics (Grand Quest) SAS , STMicroelectronics (Alps) SAS
Inventor： Fabrice Cheruel , Dragos Davidescu , Nicolas Anquet
Abstract: The system-on-chip includes at least one microprocessor domain including a microprocessor and at least one resource; and a resource isolation system including a filtering circuit for each resource and configured to detect a security, privilege and compartmentalization access rights violation for the resource, by transactions arriving at the resource. The filtering circuit is configured, in the event of a violation of at least one access right to the resource by a transaction, to generate a first error signal representative of the violated access right to the resource, and a second error signal representative of at least one access right of this transaction.
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公开(公告)号：US20240125930A1
公开(公告)日：2024-04-18
申请号：US18377893
申请日：2023-10-09
Applicant: STMicroelectronics (Grenoble 2) SAS , STMicroelectronics Design and Application S.R.O. , STMicroelectronics (Alps) SAS
Inventor： Robin VASSAL , Jiri ANDRLE , Peter CABAJ , Cyrille TROUILLEAU
Abstract: A method is for detecting one or more objects in a detection zone using a time-of-flight sensor. The method includes emitting optical radiation via the emission circuitry of the sensor and subsequently capturing the reflected optical radiation using the reception circuitry. This captured radiation is quantified in terms of photons, and measurement circuitry determines both the amount of these photons and the distance from the sensor to the object(s). An analysis of the photon count, combined with the calculated distance, is used to determine the presence or absence of objects within the detection zone.
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公开(公告)号：US20240110826A1
公开(公告)日：2024-04-04
申请号：US17955056
申请日：2022-09-28
Applicant: STMicroelectronics (Alps) SAS
Inventor： Vratislav Michal
CPC classification number: G01J1/4204 , G01J1/44 , G01J2001/446 , H03F3/45071
Abstract: A circuit can be used for reading out a light sensor. The circuit includes an operational amplifier. A first capacitor has a first electrode coupled to an inverting input of the operational amplifier and a second electrode coupled to a non-inverting output of the operational amplifier. A compensation circuit is coupled between the operational amplifier and the first capacitor. A preset circuit has an input coupled to a first voltage node and an output coupled to the first capacitor. The first voltage node configured to carry a first voltage equal to a preset voltage multiplied by a coefficient.
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Patent Agency Ranking
公开(公告)号：US20230384429A1
公开(公告)日：2023-11-30
申请号：US18359477
申请日：2023-07-26
Applicant: STMicroelectronics (Alps) SAS
Inventor： Romain David , Xavier Branca
CPC classification number: G01S7/484 , G01S17/10 , H01S5/0428 , H01S5/062
Abstract: The present disclosure relates to a driver circuit for an optical light emitter of a ranging device, the driver circuit comprising: an inductor having a first of its nodes coupled to a current driver; a first branch comprising a first switch coupled between the second node of the inductor and a first supply voltage rail; a second branch for conducting a current through the optical light emitter, the second branch being coupled between the second node of the inductor and the first supply voltage rail; and a current sensor configured to detect the current passing through the inductor and to provide a feedback signal to the current driver.
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公开(公告)号：US11829188B2
公开(公告)日：2023-11-28
申请号：US16953993
申请日：2020-11-20
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics (Alps) SAS , STMicroelectronics (Grand Ouest) SAS
Inventor： Loic Pallardy , Nicolas Anquet , Dragos Davidescu
CPC classification number: G06F11/0751 , G06F11/0721 , G06F11/3656 , G06F13/4282 , G06F21/44 , G06F2213/0016 , G06F2213/0038
Abstract: In an embodiment a system on chip includes a plurality of microprocessors, a plurality of slave resources, an interconnection circuit coupled between the microprocessors and the slave resources, the interconnection circuit configured to route transactions between the microprocessors and the slave resources and a processing controller configured to allow a user of the system to implement within the system at least one configuration diagram of the system defined by a set of configuration pieces of information used to define an assignment of at least one microprocessor to at least some of the slave resources, select the at least one microprocessors, and authorise an external debugging tool to access, for debugging purposes, only the slave resources assigned to the at least one microprocessor.
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公开(公告)号：US11824504B2
公开(公告)日：2023-11-21
申请号：US17342040
申请日：2021-06-08
Applicant: STMicroelectronics (Alps) SAS
Inventor： Kuno Lenz
CPC classification number: H03F3/45475 , H03F1/0205 , H03F3/45636 , H03F2203/45048 , H03F2203/45138
Abstract: The present disclosure relates to a device comprising two error amplifier stages having their first inputs interconnected, their second inputs interconnected and their outputs coupled to an output of the device, each stage comprising an operational amplifier; a circuit for calibrating the amplifier; a switch coupling an input of the amplifier to the first input; a switch coupling another input of the amplifier to the second input; a switch coupling an output of the amplifier to the stage output; a switch having on state which short-circuits the inputs of the amplifier; and a switch coupling the output of the amplifier to the calibration circuit.
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公开(公告)号：US20230327621A1
公开(公告)日：2023-10-12
申请号：US18189665
申请日：2023-03-24
Inventor： Vratislav Michal
CPC classification number: H03F3/45179 , H03F1/0205
Abstract: In an embodiment a device includes an input node configured to receive a first current, an output node configured to provide a second current determined by the first current, a first resistor having a first terminal connected to the input node and a second terminal coupled to a first node configured to receive a first supply voltage, a first MOS transistor having a source connected to the first node and a drain coupled to the output node of the device, a second resistor having a first terminal connected to a gate of the first MOS transistor, a biasing circuit configured to provide a biasing voltage on a second terminal of the second resistor and a first capacitor connected between the input node and the gate of the first MOS transistor.
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公开(公告)号：US20230291216A1
公开(公告)日：2023-09-14
申请号：US18117619
申请日：2023-03-06
Inventor： Alexandre TRAMONI , Nicolas LAFARGUE
CPC classification number: H02J7/0047 , H02J7/00711 , H02J7/007182 , G06F1/28 , H04B5/0043
Abstract: A circuit monitors a first voltage delivered by a battery. The monitored first voltage is compared with a second voltage. When the comparator detects that the first voltage is smaller than the second voltage, a counter starts counting. If the value of the counter during said counting exceeds a limiting value, an interruption signal is generated to control an operating mode of an electronic device power by said battery.
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