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153 条记录 (耗时 0.032 秒)

    Method of manufacturing semiconductor device
    61.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US08883587B2

    公开(公告)日：2014-11-11

    申请号：US13187175

    申请日：2011-07-20

    申请人： Seung Hwan Kim

    发明人： Seung Hwan Kim

    IPC分类号： H01L21/223 ,  H01L27/108 ,  H01L21/225

    CPC分类号： H01L27/10876 ,  H01L21/2257 ,  H01L27/10885 ,  H01L27/10888

    摘要： A method of manufacturing a semiconductor device includes forming silicon line patterns in a semiconductor substrate, forming an insulating layer over the silicon line patterns, forming a conductive pattern between the silicon line patterns, forming a spacer over the substrate, forming an interlayer insulating layer between the silicon line patterns, removing the spacer on one side of the silicon line patterns to expose the conductive pattern, forming a bit line contact open region by removing the interlayer insulating layer, forming a polysilicon pattern to cover the bit line contact open region, and forming a junction region diffused to the silicon line pattern through the bit line contact open region. Thereby, a stacked structure of a titanium layer and a polysilicon layer are stably formed when forming a buried bit line and a bit line contact is formed using diffusion of the polysilicon layer to prevent leakage current.

    摘要翻译： 一种制造半导体器件的方法包括在半导体衬底中形成硅线图案，在硅线图案之上形成绝缘层，在硅线图案之间形成导电图案，在衬底之上形成间隔物，在衬底之间形成层间绝缘层， 硅线图案，去除硅线图案一侧上的间隔物以暴露导电图案，通过去除层间绝缘层形成位线接触开放区域，形成覆盖位线接触开放区域的多晶硅图案，以及 通过位线接触开口区域形成扩散到硅线图形的结区域。 由此，当形成掩埋位线时，稳定地形成钛层和多晶硅层的堆叠结构，并且通过多晶硅层的扩散形成位线接触以防止漏电流。

    Semiconductor device and method for fabricating the same
    62.
    发明授权
    Semiconductor device and method for fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08872259B2

    公开(公告)日：2014-10-28

    申请号：US13445798

    申请日：2012-04-12

    申请人： Seung Hwan Kim ,  Jai Hoon Sim

    发明人： Seung Hwan Kim ,  Jai Hoon Sim

    IPC分类号： H01L29/66 ,  H01L27/108 ,  H01L27/02

    CPC分类号： H01L27/10823 ,  H01L27/0218 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/4236 ,  H01L29/42364

    摘要： A semiconductor device and a method for fabricating the same are provided to prevent a floating body effect and reduce coupling capacitance between buried bit lines. The semiconductor device comprises a first pillar disposed over a semiconductor substrate and including a vertical channel region, a bit line located in the lower portion of the vertical channel region inside the first pillar and a semiconductor layer extended from the semiconductor substrate to one sidewall of the first pillar.

    摘要翻译： 提供半导体器件及其制造方法，以防止浮体效应并降低掩埋位线之间的耦合电容。 半导体器件包括设置在半导体衬底上并包括垂直沟道区的第一柱，位于第一柱内部的垂直沟道区的下部的位线和从半导体衬底延伸至半导体衬底的一个侧壁的半导体层 第一支柱

    Semiconductor memory cell and semiconductor device
    63.
    发明授权
    Semiconductor memory cell and semiconductor device 有权
    半导体存储单元和半导体器件

    公开(公告)号：US08861261B2

    公开(公告)日：2014-10-14

    申请号：US13327458

    申请日：2011-12-15

    申请人： Seung Hwan Kim

    发明人： Seung Hwan Kim

    IPC分类号： G11C11/24 ,  H01L27/108

    CPC分类号： H01L27/10876 ,  H01L27/10885 ,  H01L27/10888

    摘要： A technology is a semiconductor cell and a semiconductor device capable of reducing the coupling capacitance between adjacent bit lines by forming a bit line junction region in a separated island shape when forming a buried bit line, thereby improving characteristics of the semiconductor devices. The semiconductor cell includes a transistor including a gate and a gate junction region, a plurality of buried bit lines disposed to intersect the gate, and a plurality of bit line junction regions, each bit line junction region having an island shape formed between the buried bit lines and connected to the buried bit line.

    摘要翻译： 一种技术是通过在形成掩埋位线时形成分离岛形状的位线结区域，能够减小相邻位线之间的耦合电容，从而提高半导体器件的特性的半导体单元和半导体器件。 半导体单元包括晶体管，其包括栅极和栅极结区域，与栅极交叉设置的多个埋入位线以及多个位线结区域，每个位线结区域形成在掩埋位之间 线并连接到埋地线。

    Method of segmenting lesions in images
    66.
    发明授权
    Method of segmenting lesions in images 有权
    分割图像病变的方法

    公开(公告)号：US08655039B2

    公开(公告)日：2014-02-18

    申请号：US13285231

    申请日：2011-10-31

    申请人： Dong Hoon Yu ,  Soo Yeul Lee ,  Jeong Won Lee ,  Seung Hwan Kim

    发明人： Dong Hoon Yu ,  Soo Yeul Lee ,  Jeong Won Lee ,  Seung Hwan Kim

    IPC分类号： G06K9/00 ,  A61B5/05

    CPC分类号： G06T5/002 ,  G06K2209/05 ,  G06T5/008 ,  G06T7/11 ,  G06T7/155 ,  G06T2207/10088 ,  G06T2207/10116 ,  G06T2207/10132 ,  G06T2207/20036 ,  G06T2207/30068

    摘要： The method of segmenting a lesion in an image according to the present invention includes the steps of: obtaining an image of a region of interest from an image of a lesion; adjusting the contrast of the obtained image of the region of interest such that the contrast changes according to the distance from the center of the region of interest; removing noise from the image whose contrast is adjusted; and separating the region of the lesion from the noise-removed image. In the step of adjusting the contrast, the image is adjusted such that the contrast is increased as it goes away from the center of the region of interest, and thus it is possible to segment the lesion while maintaining the original shape of the lesion, thereby reliably segmenting the lesion even in the case where the inside of the lesion is not uniform.

    摘要翻译： 根据本发明的分割图像中的病变的方法包括以下步骤：从病变的图像获得感兴趣区域的图像; 调整所获取的感兴趣区域的图像的对比度，使得对比度根据与感兴趣区域的中心的距离而变化; 从对比度调整的图像中去除噪声; 并将病变的区域与去除噪声的图像分开。 在调整对比度的步骤中，调整图像，使得对比度随着离开感兴趣区域的中心而增加，因此可以在保持病变的原始形状的同时分割病变，由此 即使在病变的内部不均匀的情况下也可以可靠地分割病变。

    Lossless coding technique for CABAC in HEVC
    67.
    发明授权
    Lossless coding technique for CABAC in HEVC 有权
    HEV中CABAC的无损编码技术

    公开(公告)号：US08581753B2

    公开(公告)日：2013-11-12

    申请号：US13360615

    申请日：2012-01-27

    申请人： Seung-Hwan Kim ,  Christopher Andrew Segall

    发明人： Seung-Hwan Kim ,  Christopher Andrew Segall

    IPC分类号： H03M7/34

    CPC分类号： H04N19/18 ,  H03M7/4018 ,  H04N19/13 ,  H04N19/156 ,  H04N19/61

    摘要： A system utilizing a lossless coding technique for CABAC in HEVC is described. The system includes a first and second electronic device. The first electronic device encodes according to a lossless coding technique for CABAC in HEVC. The second electronic device decodes according to a lossless coding technique for CABAC in HEVC.

    摘要翻译： 描述了在HEVC中利用CABAC的无损编码技术的系统。 该系统包括第一和第二电子设备。 第一个电子设备根据HEVC中CABAC的无损编码技术进行编码。 第二个电子设备根据HVC中CABAC的无损编码技术进行解码。

    Lossless coding with different parameter selection technique for CABAC in HEVC
    68.
    发明授权
    Lossless coding with different parameter selection technique for CABAC in HEVC 有权
    无缝编码，采用不同的参数选择技术，对于CABAC在HEVC中

    公开(公告)号：US08552890B2

    公开(公告)日：2013-10-08

    申请号：US13444710

    申请日：2012-04-11

    申请人： Seung-Hwan Kim ,  Christopher Andrew Segall

    发明人： Seung-Hwan Kim ,  Christopher Andrew Segall

    IPC分类号： H03M7/34

    CPC分类号： H03M7/4018 ,  H04N19/12 ,  H04N19/13 ,  H04N19/136 ,  H04N19/146 ,  H04N19/176 ,  H04N19/18 ,  H04N19/61 ,  H04N19/70

    摘要： A system utilizing a high throughput lossless coding mode for CABAC in HEVC is described. The system may include an electronic device configured to obtain a block of data to be encoded using an arithmetic based encoder; determine whether the block of data is to be encoded using lossless encoding; in response to determining that the block of data is not to be encoded using lossless encoding, use a first Absolute-3 coding technique to encode the block of data; in response to determining that the block of data is to be encoded using lossless encoding, use a second Absolute-3 coding technique to encode the block of data; wherein the second Absolute-3 coding technique is different than the first Absolute-3 coding technique.

    摘要翻译： 描述了在HEVC中利用CABAC的高吞吐量无损编码模式的系统。 该系统可以包括被配置为使用基于算术的编码器来获得要编码的数据块的电子设备; 确定数据块是否使用无损编码进行编码; 响应于确定数据块不使用无损编码进行编码，使用第一绝对3编码技术对数据块进行编码; 响应于确定要使用无损编码对数据块进行编码，使用第二绝对3编码技术对数据块进行编码; 其中第二绝对3编码技术不同于第一绝对3编码技术。

    Semiconductor device with vertical gate and method for manufacturing the same
    69.
    发明授权
    Semiconductor device with vertical gate and method for manufacturing the same 失效
    具有垂直栅极的半导体器件及其制造方法

    公开(公告)号：US08507374B2

    公开(公告)日：2013-08-13

    申请号：US12969537

    申请日：2010-12-15

    申请人： Seung Hwan Kim

    发明人： Seung Hwan Kim

    IPC分类号： H01L27/108 ,  H01L21/28

    CPC分类号： H01L27/10826 ,  H01L27/10885

    摘要： A semiconductor device and a method for manufacturing the same are disclosed. The method for manufacturing the semiconductor device comprises: forming a plurality of first pillar patterns each of which includes a sidewall contact by selectively etching a semiconductor substrate; forming a buried bit line at a lower portion of a region between two neighboring first pillar patterns; forming a plurality of second pillar patterns by selectively etching upper portions of the first pillar patterns; and forming a gate coupling second pillar patterns arranged in a direction crossing the bit line, the gate enclosing the second pillar patterns.

    摘要翻译： 公开了一种半导体器件及其制造方法。 制造半导体器件的方法包括：通过选择性蚀刻半导体衬底，形成多个第一柱状图案，每个第一柱状图案包括侧壁接触; 在两个相邻的第一柱状图案之间的区域的下部形成掩埋位线; 通过选择性地蚀刻第一柱图案的上部来形成多个第二柱图案; 以及形成沿与所述位线交叉的方向布置的栅极耦合第二柱状图案，所述栅极包围所述第二柱状图案。