公开(公告)号：US5793673A

公开(公告)日：1998-08-11

申请号：US914518

申请日：1997-08-19

申请人： Federico Pio ,  Carlo Riva

发明人： Federico Pio ,  Carlo Riva

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C11/34 ,  H01L29/68

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A method for programming a two-level polysilicon EEPROM memory cell, which cell is implemented in MOS technology on a semiconductor substrate and comprises a floating gate transistor and a further control gate overlying the floating gate with a dielectric layer therebetween, provides for the application of a negative voltage to the control gate during the cell write phase. This enables the voltages being applied across the thin tunnel oxide layer to be distributed so as to reduce the maximum amount of energy of the "holes" and improve the oxide reliability. In addition, by controlling the rise speed of the impulse to the drain region during the write phase, and of the impulse to the control gate during the erase phase, the maximum current flowing through the tunnel oxide can be set and the electric field being applied to the tunnel oxide kept constant, thereby the device life span can be extended.

摘要翻译： 一种用于编程两电平多晶硅EEPROM存储单元的方法，该单元在半导体衬底上的MOS技术中实现，并且包括浮置栅晶体管和覆盖浮置栅极的其它控制栅极，其间具有介电层， 在单元写入阶段期间向控制栅极施加负电压。 这使得施加在薄隧道氧化物层上的电压被分布，以便减少“孔”的最大能量并提高氧化物的可靠性。 此外，通过在写入阶段期间控制到漏极区域的脉冲的上升速度以及在擦除阶段期间对控制栅极的脉冲的上升速度，可以设定流过隧道氧化物的最大电流并施加电场 隧道氧化物保持恒定，从而可延长设备使用寿命。

公开(公告)号：US5367483A

公开(公告)日：1994-11-22

申请号：US983799

申请日：1992-11-24

申请人： Paolo Ghezzi ,  Federico Pio ,  Carlo Riva

发明人： Paolo Ghezzi ,  Federico Pio ,  Carlo Riva

IPC分类号： G11C17/00 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C7/00 ,  H01L21/70

CPC分类号： H01L27/11521 ,  H01L27/11558

摘要： A method for producing electrically erasable and programmable read-only memory cells with a single polysilicon level, including the use of a sacrificial layer of silicon oxide to produce a high-thickness silicon oxide layer on the active area. The active area of the cell is protected from heavy source and drain implantation in order to improve reliability.

摘要翻译： 一种用于制造具有单个多晶硅级别的电可擦除和可编程只读存储器单元的方法，包括使用氧化硅牺牲层在有源区上产生高厚度氧化硅层。 为了提高可靠性，保护电池的有源区域免受重的源极和漏极注入。

公开(公告)号：US5223134A

公开(公告)日：1993-06-29

申请号：US946028

申请日：1992-09-15

申请人： Carlo Riva

发明人： Carlo Riva

IPC分类号： B01D29/15

CPC分类号： B01D29/15 ,  B01D2201/0415 ,  Y10T292/214

摘要： A device for the rapid fastening and unfastening of a tubular filtering fabric, comprises:a) a bearing structure (1, 1', 1") able to support filtering fabric (7) in the form of the desired tubular section;b) a fastening sleeve (2, 2') placed at each end of the tubular filtering fabric (7) and working with an outside ring (3, 3') and an inserted annular seal (5, 5') to allow tight anchoring of each of the ends of the tubular filtering fabric; andc) a fastening head (4, 4') placed at each end of the filtering fabric (7) and working with the fastening sleeve (2, 2') to press the ring (3, 3') tight in a stable manner against the sleeve (2, 2').

摘要翻译： 一种用于快速紧固和松开管状过滤织物的装置，包括：a）能够支撑所需管状部分形式的过滤织物（7）的轴承结构（1,1'，1“）; b）设置在管状过滤织物（7）的每个端部处并与外部环（3,3'）和插入的环形密封件（5,5'）一起工作的紧固套筒（2,2'），以允许紧固 管状过滤织物的每个端部; 和c）放置在过滤织物（7）的每个端部处的紧固头（4,4'），并且与紧固套筒（2,2'）一起以稳定的方式紧紧地按压环（3,3'） 相对于套筒（2,2'）。

公开(公告)号：US5081610A

公开(公告)日：1992-01-14

申请号：US491903

申请日：1990-03-12

申请人： Marco Olivo ,  Carlo Riva

发明人： Marco Olivo ,  Carlo Riva

IPC分类号： G11C17/00 ,  G11C16/04 ,  G11C16/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792

CPC分类号： G11C16/28

摘要： A reference cell for reading EEPROM memory devices, capable of discharging any charges present in its own floating gate without varying the geometry of the cell with respect to that of the associated memory cells and without requiring specific manufacturing steps. For this purpose, a switch element, for example a diode, is provided between the floating gate and the substrate of the device and discharges any charges present in the floating gate toward the substrate during the cell idle state in the absence of read signals.

公开(公告)号：US4971984A

公开(公告)日：1990-11-20

申请号：US131393

申请日：1987-12-10

申请人： Marco Frigerio ,  Andrea Zaliani ,  Carlo Riva ,  Carmelo Gandolfi ,  Odoardo Tofanetti ,  Sergio Tognella

发明人： Marco Frigerio ,  Andrea Zaliani ,  Carlo Riva ,  Carmelo Gandolfi ,  Odoardo Tofanetti ,  Sergio Tognella

IPC分类号： A61K31/4427 ,  A61K31/455 ,  A61P7/02 ,  A61P9/12 ,  C07D211/90 ,  C07D401/12

CPC分类号： C07D401/12 ,  C07D211/90

摘要： Compounds of formula I ##STR1## wherein R.sub.1 is a cyano, nitro, benzoyl, acetyl, amido or alkoxycarbonyl group;R.sub.2 is substituted aryl- or heterocyclic residue;R.sub.3 is alkoxycarbonyl group;R.sub.4 and R.sub.5, being the same or different, are hydrogen, alkyl, aryl or heterocyclic groups;Y is oxygen, sulphur or substituted or unsubstituted nitrogen atom, that can be a part of a heterocyclic ring;n is 0, 1 or 2R6 and R.sub.10, that can be the same or different, are: hydrogen; C.sub.1 -C.sub.6 -alkyl optionally substituted by hydroxy, amino, monoalkyl and dialkylamino, C.sub.1 -C.sub.6 -alkoxy, C.sub.1 -C.sub.6 -alkoxycarbonyl, C.sub.1 -C.sub.3 -carbonyloxy, aryl, heteroaryl and cycloalkyl; a C.sub.1 -C.sub.12 -alkanoyl, aroyl or heteroaryl group optionally substituted by halogen, nitro, amino monoalkylamino, dialkylamino, hydroxy, C.sub.1 -C.sub.6 -alkoxy, C.sub.1 -C.sub.6 -alkoxycarbonyl, C.sub.1 -C.sub.6 -alkylthio, C.sub.1 -C.sub.3 -carbonyloxy, aryl, heteroaryl, cycloalkyl groups.These compounds are useful in therapy as cardiovascular agents.

公开(公告)号：US4935790A

公开(公告)日：1990-06-19

申请号：US136652

申请日：1987-12-22

申请人： Paolo G. Cappelletti ,  Giuseppe Corda ,  Carlo Riva

发明人： Paolo G. Cappelletti ,  Giuseppe Corda ,  Carlo Riva

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/115 ,  H01L29/7883

摘要： The cell is formed of a selection transistor, a detection transistor and a tunnel condenser. The detection Transistor has its own control gate formed with an n.sup.+ diffusion which is closed and isolated from those of the other cells of the same memory.

公开(公告)号：US4780431A

公开(公告)日：1988-10-25

申请号：US69183

申请日：1987-07-02

申请人： Franco Maggioni ,  Carlo Riva

发明人： Franco Maggioni ,  Carlo Riva

IPC分类号： H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/441

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11529

摘要： The process provides for obtaining in the areas intended for the formation of the transistors windows in the intermediate oxide layer between the two silicon layers and, before final etching of the two silicon layers and the intermediate oxide, application of a mask formed in such a manner as to superimpose on the second silicon layer in the transistor areas coverings wider than the corresponding windows of the intermediate oxide layer.

摘要翻译： 该过程提供在用于在两个硅层之间的中间氧化物层中形成晶体管窗口的区域中获得，并且在两个硅层和中间氧化物的最终蚀刻之前，施加以这种方式形成的掩模 以便在比中间氧化物层的相应窗口更宽的晶体管区域覆盖层中的第二硅层上叠加。