公开(公告)号：US09305325B2

公开(公告)日：2016-04-05

申请号：US14037313

申请日：2013-09-25

Applicant: Apple Inc.

Inventor： Joseph J. Cheng ,  Guy Cote ,  Marc A. Schaub ,  Jim C. Chou

IPC: G06T1/20 ,  G06T1/60 ,  H04N19/61 ,  H04N19/423 ,  H04N19/436

CPC classification number: G06T1/20 ,  G06T1/60 ,  H04N19/423 ,  H04N19/436 ,  H04N19/61

Abstract: Methods and apparatus for caching neighbor data in a block processing pipeline that processes blocks in knight's order with quadrow constraints. Stages of the pipeline may maintain two local buffers that contain data from neighbor blocks of a current block. A first buffer contains data from the last C blocks processed at the stage. A second buffer contains data from neighbor blocks on the last row of a previous quadrow. Data for blocks on the bottom row of a quadrow are stored to an external memory at the end of the pipeline. When a block on the top row of a quadrow is input to the pipeline, neighbor data from the bottom row of the previous quadrow is read from the external memory and passed down the pipeline, each stage storing the data in its second buffer and using the neighbor data in the second buffer when processing the block.

Abstract translation: 用于在块处理管道中缓存邻居数据的方法和装置，其以四限制约束以骑士顺序处理块。 管道的阶段可以维护两个包含当前块的相邻块的数据的本地缓冲器。 第一个缓冲区包含在该阶段处理的最后一个C块的数据。 第二个缓冲区包含来自前一个四边形最后一行的相邻块的数据。 四边形底行中的块的数据存储在流水线末端的外部存储器中。 当四边形的顶行上的块被输入到流水线时，从外部存储器读取来自前一个四边形的底行的邻居数据，并将其传送到流水线，每个级将数据存储在其第二缓冲器中，并使用 处理块时第二个缓冲区中的邻居数据。

公开(公告)号：US20150092843A1

公开(公告)日：2015-04-02

申请号：US14039764

申请日：2013-09-27

Applicant: Apple Inc.

Inventor： Timothy John Millet ,  Mark P. Rygh ,  Craig M. Okruhlica ,  Jim C. Chou ,  Guy Cote ,  Gaurav S. Gulati ,  Joseph J. Cheng ,  Joseph P. Bratt

IPC: H04N19/57 ,  H04N19/186 ,  H04N19/182

CPC classification number: H04N19/423 ,  H04N19/53

Abstract: Block processing pipeline methods and apparatus in which reference data are stored to a memory according to tile formats to reduce memory accesses when fetching the data from the memory. When the pipeline stores reference data from a current frame being processed to memory as a reference frame, the reference samples are stored in macroblock sequential order. Each macroblock sample set is stored as a tile. Reference data may be stored in tile formats for luma and chroma. Chroma reference data may be stored in tile formats for chroma 4:2:0, 4:2:2, and/or 4:4:4 formats. A stage of the pipeline may write luma and chroma reference data for macroblocks to memory according to one or more of the macroblock tile formats in a modified knight's order. The stage may delay writing the reference data from the macroblocks until the macroblocks have been fully processed by the pipeline.

Abstract translation: 块处理管道方法和装置，其中参考数据根据瓦片格式存储到存储器中，以在从存储器取出数据时减少存储器访问。 当流水线将正在处理的当前帧的参考数据存储为参考帧时，参考样本以宏块顺序存储。 每个宏块样本集被存储为一个图块。 参考数据可以以瓦片和色度的瓦片格式存储。 色度参考数据可以以瓦4：2：0,4：2：2和/或4：4：4格式的瓦片格式存储。 流水线的一个阶段可以根据改进的骑士顺序中的一个或多个宏块瓦片格式将宏块的亮度和色度参考数据写入存储器。 该阶段可以延迟从宏块写入参考数据，直到宏块已被管道完全处理。

公开(公告)号：US20150091921A1

公开(公告)日：2015-04-02

申请号：US14039845

申请日：2013-09-27

Applicant: Apple Inc.

Inventor： Guy Cote ,  Timothy John Millet ,  Joseph J. Cheng ,  Mark P. Rygh ,  Jim C. Chou

IPC: G06T1/20

CPC classification number: G06T1/20 ,  G06T1/60 ,  H04N19/176 ,  H04N19/40 ,  H04N19/423 ,  H04N19/436 ,  H04N19/91

Abstract: In the video encoders described herein, blocks of pixels from a video frame may be encoded (e.g., using CAVLC encoding) in a block processing pipeline using wavefront ordering (e.g., in knight's order). Each of the encoded blocks may be written to a particular one of multiple DMA buffers such that the encoded blocks written to each of the buffers represent consecutive blocks of the video frame in scan order. A transcode pipeline may operate in parallel with (or at least overlapping) the operation of the block processing pipeline. The transcode pipeline may read encoded blocks from the buffers in scan order and merge them into a single bit stream (in scan order). A transcoder core of the transcode pipeline may decode the encoded blocks and encode them using a different encoding process (e.g., CABAC). In some cases, the transcoder may be bypassed.

Abstract translation: 在本文描述的视频编码器中，来自视频帧的像素块可以使用波前排序（例如骑士顺序）在块处理流水线中进行编码（例如，使用CAVLC编码）。 每个编码块可以被写入多个DMA缓冲器中的特定一个，使得写入每个缓冲器的编码块以扫描顺序表示视频帧的连续块。 代码流水线可以与（或至少重叠）块处理流水线的操作并行操作。 代码流水线可以以扫描顺序从缓冲器读取编码块，并将它们合并成单个位流（按扫描顺序）。 代码转换流水线的代码转换器核心可以解码编码的块，并使用不同的编码过程（例如，CABAC）对它们进行编码。 在某些情况下，代码转换器可能被旁路。

公开(公告)号：US12192554B2

公开(公告)日：2025-01-07

申请号：US18329040

申请日：2023-06-05

Applicant: Apple Inc.

Inventor： Moinul H. Khan ,  Jim C. Chou ,  Sorin C. Cismas

IPC: H04N21/2662 ,  H04L1/00 ,  H04N19/59 ,  H04W72/542

Abstract: An electronic device includes a wireless transceiver configured to receive content primitives via a wireless communication channel. The electronic device also includes control circuitry control circuitry coupled to the wireless transceiver, and configured to perform content provisioning operations based on the received content primitives, wherein the content provisioning operations comprise generating content image data and transmitting the content image data to the wireless communication channel using the wireless transceiver. In response to a bandwidth condition of the wireless communication channel being less than a threshold, the control circuitry is configured to perform adjusted content provisioning operations that decrease an amount of content image data conveyed by the wireless transceiver to the wireless communication channel.

公开(公告)号：US20240404488A1

公开(公告)日：2024-12-05

申请号：US18325997

申请日：2023-05-30

Applicant: Apple Inc.

Inventor： Shereef Shehata ,  Jim C. Chou ,  Sterling G. Orsten ,  Shengchang Cai

IPC: G09G5/373 ,  G09G5/391

Abstract: A system may include a display for displaying an image frame that is divided into regions having respective resolutions based on display image data. The device may also include image processing circuitry to generate the display image data based on multi-resolution image data and vignetting data generated by determining a phase offset of the pixel grouping indicative of a relative distance between the pixel grouping and a grid line of a vignetting grid and determining a relative location of the pixel grouping with respect to a set of the grid points based on the phase offset and interpolating between the vignetting values of the set of grid points to generate the vignetting data based on the relative location. The vignetting grid may include multiple grid points having corresponding vignetting values. Additionally, the image processing circuitry may apply the vignetting data to the multi-resolution image data of the pixel grouping.

公开(公告)号：US20240404479A1

公开(公告)日：2024-12-05

申请号：US18328329

申请日：2023-06-02

Applicant: Apple Inc.

Inventor： Shereef Shehata ,  Jim C. Chou

IPC: G09G3/3291

Abstract: An electronic display may include a display panel comprising a plurality of display pixels, an image source configured to store image data, and image processing circuitry. The image processing circuitry may receive a brightness level of the display panel and receive the image data that may include gray level data for a first display pixel of the plurality of display pixels. The image processing circuitry may convert the gray level data to voltage data based on the brightness level, determine a compensation for the voltage data based on a global voltage compensation value and a local voltage compensation value, and apply the compensation to the voltage data to generate compensated voltage data. The image processing circuitry may compress a range of the compensated voltage data and convert the compensated voltage data into compensated gray level data for the first display pixel.

公开(公告)号：US20240404187A1

公开(公告)日：2024-12-05

申请号：US18799821

申请日：2024-08-09

Applicant: Apple Inc.

Inventor： Yun Gong ,  Jim C. Chou ,  Guy Cote

IPC: G06T15/50 ,  G06T3/18

Abstract: A device may include an electronic display to display an image frame based on blended image data and image processing circuitry to generate the blended image data by combining first image data and second image data via a blend operation. The blend operation may include receiving graphics alpha data indicative of a transparency factor to be applied to the first image data to generate a first layer of the blend operation. The blend operation may also include overlaying the first layer onto a second layer that is based on the second image data. Overlaying the first layer onto the second layer may include adding first pixel values of the first image data that include negative pixel values and are augmented by the transparency factor to second pixel values of the second image data to generate blended pixel values of the blended image data.

公开(公告)号：US20240403999A1

公开(公告)日：2024-12-05

申请号：US18325434

申请日：2023-05-30

Applicant: Apple Inc.

Inventor： Jim C. Chou ,  Yung-Chin Chen

IPC: G06T3/40 ,  G06F3/01 ,  G06F3/147 ,  G06T7/11

Abstract: A system may include a display for displaying an image frame that is divided into regions having respective resolutions based on display image data. The system may also include image processing circuitry to generate the display image data based on multi-resolution image data and generate record image data based on the multi-resolution image data. Generating the record image data may include obtaining boundary data indicative of locations of boundaries between the regions resampling the multi-resolution image data based on the boundary data. Resampling the multi-resolution image data may include performing a first resampling on a first portion of the multi-resolution image data corresponding to a first region and performing a second resampling, different from the first resampling, on a second portion of the multi-resolution image data corresponding to a second region.

公开(公告)号：US20240394952A1

公开(公告)日：2024-11-28

申请号：US18797340

申请日：2024-08-07

Applicant: Apple Inc.

Inventor： Arthur Y Zhang ,  Ray L. Chang ,  Timothy R. Oriol ,  Ling Su ,  Gurjeet S. Saund ,  Guy Cote ,  Jim C. Chou ,  Hao Pan ,  Tobias Eble ,  Avi Bar-Zeev ,  Sheng Zhang ,  Justin A. Hensley ,  Geoffrey Stahl

IPC: G06T15/00 ,  G06F3/01 ,  G06T3/18 ,  G06T9/00 ,  H04W76/10 ,  H04W88/08

Abstract: A mixed reality system that includes a device and a base station that communicate via a wireless connection The device may include sensors that collect information about the user's environment and about the user. The information collected by the sensors may be transmitted to the base station via the wireless connection. The base station renders frames or slices based at least in part on the sensor information received from the device, encodes the frames or slices, and transmits the compressed frames or slices to the device for decoding and display. The base station may provide more computing power than conventional stand-alone systems, and the wireless connection does not tether the device to the base station as in conventional tethered systems. The system may implement methods and apparatus to maintain a target frame rate through the wireless link and to minimize latency in frame rendering, transmittal, and display.

公开(公告)号：US20240233094A1

公开(公告)日：2024-07-11

申请号：US18416654

申请日：2024-01-18

Applicant: Apple Inc.

Inventor： Jim C. Chou ,  Yun Gong

IPC: G06T5/70 ,  G06T3/4007 ,  G06T5/50

CPC classification number: G06T5/70 ,  G06T3/4007 ,  G06T5/50 ,  G06T2207/20192 ,  G06T2207/20216

Abstract: An electronic device may include scaling circuitry to scale input pixel data to a greater resolution. The directional scaling circuitry may include first interpolation circuitry to receive best mode data, including one or more angles corresponding to content of the image and interpolate first pixel values at first pixel positions diagonally offset from input pixel positions of the input pixel data based on the best mode data and input pixel values corresponding to the input pixel positions. The directional scaling circuitry may also include second interpolation circuitry to receive the best mode data and the input pixel values and interpolate second pixel values at second pixel positions horizontally or vertically offset from the input pixel positions based at least in part on the best mode data and the input pixel values.