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公开(公告)号:US12212729B2
公开(公告)日:2025-01-28
申请号:US18231648
申请日:2023-08-08
Applicant: Apple Inc.
Inventor: Yung-Chin Chen , Michael Bekerman , Guy Côté , Aleksandr M. Movshovich , D. Amnon Silverstein , David R. Pope
IPC: H04N13/111 , G06T15/00 , G06T19/00 , H04N13/122 , H04N13/178
Abstract: In one embodiment, a system includes a first device rendering image data, a second device storing the image data, and a display panel that displays the image data stored in the memory. The first device renders multiple frames of the image data, compresses the multiple frames into a single superframe, and transports the single superframe. The second device receives the single superframe, decompresses the single superframe into the multiple frames of image data, and stores the image data on a memory of the second device.
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公开(公告)号:US12141893B2
公开(公告)日:2024-11-12
申请号:US17933409
申请日:2022-09-19
Applicant: Apple Inc.
Inventor: Ido Y Soffair , Uri Nix , Yung-Chin Chen , Jim C Chou , Jian Zhou , Assaf Menachem , Sorin C Cismas
Abstract: A device may include a display for displaying an image frame based on warped image data and image processing circuitry to generate the warped image data by warping input image data to account for one or more distortions associated with displaying the image. The image processing circuitry may include a two-stage cache architecture having an first cache and an second cache and warp the input image data by generating mapping data indicative of a warp between the input image space and the output image space and fetching the input image data to populate the first cache. Warping may also include populating the second cache with a grouping of pixel values from the first cache that are selected according to a sliding window that traverses the first cache based on the mapping data and interpolating between pixel values of the grouping to generate pixel values of the warped image data.
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公开(公告)号:US20230124009A1
公开(公告)日:2023-04-20
申请号:US18083193
申请日:2022-12-16
Applicant: Apple Inc.
Inventor: Assaf Menachem , Peter F. Holland , Yung-Chin Chen
Abstract: A method may include receiving, via a processor, a frame of image data, such that the frame of image data may include an active portion and an idle portion. The active portion may include data for presenting one or more images via a first display of a first electronic device. The method may also include receiving a signal from a second electronic device during the idle portion of the frame of image data, such that the second electronic device is separate from the first display. The method may then involve initiating processing of the frame of image data in response to the signal being received from the second electronic device.
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公开(公告)号:US11537347B2
公开(公告)日:2022-12-27
申请号:US17148512
申请日:2021-01-13
Applicant: Apple Inc.
Inventor: Assaf Menachem , Peter F. Holland , Yung-Chin Chen
Abstract: A method may include receiving, via a processor, a frame of image data, such that the frame of image data may include an active portion and an idle portion. The active portion may include data for presenting one or more images via a first display of a first electronic device. The method may also include receiving a signal from a second electronic device during the idle portion of the frame of image data, such that the second electronic device is separate from the first display. The method may then involve initiating processing of the frame of image data in response to the signal being received from the second electronic device.
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公开(公告)号:US20240107183A1
公开(公告)日:2024-03-28
申请号:US18369399
申请日:2023-09-18
Applicant: Apple Inc.
Inventor: Joseph Cheung , Kaushik Raghunath , Michael Bekerman , Moinul H. Khan , Vivaan Bahl , Yung-Chin Chen , Yuqing Su
CPC classification number: H04N23/86 , H04N23/665 , H04N23/83
Abstract: In some implementations, a method of synchronizing a content generation and delivery architecture to reduce the latency associated with image passthrough. The method includes: determining a temporal offset associated with the content generation and delivery architecture to reduce a photon-to-photon latency across the content generation and delivery architecture; obtaining a first reference rate associated with a portion of the content generation and delivery architecture; generating, via synchronization circuitry, a synchronization signal for the content generation and delivery architecture based at least in part on the first reference rate; and operating the content generation and delivery architecture according to the synchronization signal and the temporal offset.
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公开(公告)号:US20240095871A1
公开(公告)日:2024-03-21
申请号:US17933409
申请日:2022-09-19
Applicant: Apple Inc.
Inventor: Ido Y Soffair , Uri Nix , Yung-Chin Chen , Jim C Chou , Jian Zhou , Assaf Menachem , Sorin C Cismas
Abstract: A device may include a display for displaying an image frame based on warped image data and image processing circuitry to generate the warped image data by warping input image data to account for one or more distortions associated with displaying the image. The image processing circuitry may include a two-stage cache architecture having an first cache and an second cache and warp the input image data by generating mapping data indicative of a warp between the input image space and the output image space and fetching the input image data to populate the first cache. Warping may also include populating the second cache with a grouping of pixel values from the first cache that are selected according to a sliding window that traverses the first cache based on the mapping data and interpolating between pixel values of the grouping to generate pixel values of the warped image data.
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公开(公告)号:US11908376B1
公开(公告)日:2024-02-20
申请号:US17710133
申请日:2022-03-31
Applicant: Apple Inc.
Inventor: Lingtao Wang , Giovanni Carbone , Chaohao Wang , Enkhamgalan Dorjgotov , Sheng Zhang , Jim C Chou , Shereef Shehata , Yung-Chin Chen
IPC: G09G5/10 , G09G5/06 , G09G3/3233 , G09G3/20
CPC classification number: G09G3/2092 , G09G2300/0842 , G09G2320/0233 , G09G2320/0276
Abstract: A compensation system includes a processor configured to determine compensated data for display on a sub-pixel of the display device. The processor may receive image data configured to be displayed on the sub-pixel, convert the gray level data to first voltage data; fetch, from a memory, compressed 1×1 sub-pixel uniformity compensation data for the sub-pixel, and decompress the compressed 1×1 sub-pixel uniformity compensation data via a decompressor. The decompressed data comprises the 1×1 sub-pixel uniformity compensation data for the sub-pixel. The processor may also determine a voltage compensation offset value associated with the sub-pixel based on the second voltage data, generate compensated voltage data based in part on the voltage compensation offset value and the first voltage data, convert the compensated voltage data to compensated gray level data; and transmit the compensated gray level data to pixel driving circuitry associated with the sub-pixel.
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公开(公告)号:US11735147B1
公开(公告)日:2023-08-22
申请号:US17933778
申请日:2022-09-20
Applicant: Apple Inc.
Inventor: Jim C Chou , Shereef Shehata , Yung-Chin Chen
IPC: G09G5/391
CPC classification number: G09G5/391 , G09G2320/0233 , G09G2320/0285 , G09G2320/041 , G09G2320/046
Abstract: A device may include a display that display an image frame that is divided into adjustable regions having respective resolutions based on compensated image data. The device may also include image processing circuitry to generate the compensated image data by applying gains that compensate for burn-in related aging of pixels of the display. The gains are based on an aggregation of history updates indicative of estimated amounts of aging associated with pixel utilization. The circuitry may generate a history update by obtaining boundary data indicative of the boundaries between the adjustable regions, determining an estimated amount of aging, and dynamically resampling the estimated amount of aging by resampling a portion of the estimated amount of aging corresponding to an adjustable region by a factor and resampling of a different portion of the estimated amount of aging corresponding to another adjustable region by a different factor based on the boundary data.
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公开(公告)号:US20240304163A1
公开(公告)日:2024-09-12
申请号:US18119772
申请日:2023-03-09
Applicant: Apple Inc.
Inventor: Yung-Chin Chen , Hopil Bae , Mahdi Farrokh Baroughi , Sheng Zhang , Yanghyo Kim , Young Don Bae
CPC classification number: G09G5/12 , G09G5/18 , G09G2320/041 , G09G2320/0673 , G09G2340/0435
Abstract: An electronic device uses a leader synchronize signal generator to synchronize clock signal generators used by multiple components in the electronic device to a common time-base. A processor core complex of the electronic device sends per-frame configuration to a timing controller for frames to be displayed on an electronic display before a corresponding frame begins.
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公开(公告)号:US20240403999A1
公开(公告)日:2024-12-05
申请号:US18325434
申请日:2023-05-30
Applicant: Apple Inc.
Inventor: Jim C. Chou , Yung-Chin Chen
Abstract: A system may include a display for displaying an image frame that is divided into regions having respective resolutions based on display image data. The system may also include image processing circuitry to generate the display image data based on multi-resolution image data and generate record image data based on the multi-resolution image data. Generating the record image data may include obtaining boundary data indicative of locations of boundaries between the regions resampling the multi-resolution image data based on the boundary data. Resampling the multi-resolution image data may include performing a first resampling on a first portion of the multi-resolution image data corresponding to a first region and performing a second resampling, different from the first resampling, on a second portion of the multi-resolution image data corresponding to a second region.
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