公开(公告)号：US20070070093A1

公开(公告)日：2007-03-29

申请号：US11308644

申请日：2006-04-17

Applicant: Hsiang-Lin Lin ,  Ching-Huan Lin ,  Kuo-Yu Huang

Inventor： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Kuo-Yu Huang

IPC: G09G5/02

CPC classification number: G02F1/134336 ,  G02F2001/134345 ,  G02F2201/52

Abstract: An active matrix substrate including a substrate, a plurality of scan lines, a plurality of data lines and a plurality of sub-pixels is provided. The scan lines and the data lines are disposed on the substrate, and define a plurality of sub-pixel regions distributed in a delta arrangement. The sub-pixels corresponding to the sub-pixel regions are disposed on the substrate. The sub-pixels are electrically connected with corresponding scan lines and corresponding data lines. Between two sub-pixel regions corresponding to any two adjacent sub-pixels at a same side of one scan line, there are two data lines. Each sub-pixel includes an active device and a pixel electrode. The active device is electrically connected with a corresponding scan line and a corresponding data line. The pixel electrode is electrically connected with the active device, and extends from the sub-pixel region corresponding to the sub-pixel to a position over the data line.

Abstract translation: 提供了包括基板，多条扫描线，多条数据线和多个子像素的有源矩阵基板。 扫描线和数据线设置在基板上，并且限定以三角形排列分布的多个子像素区域。 对应于子像素区域的子像素设置在基板上。 子像素与相应的扫描线和对应的数据线电连接。 在与一条扫描线同侧的任意两个相邻子像素对应的两个子像素区域之间，存在两条数据线。 每个子像素包括有源器件和像素电极。 有源器件与相应的扫描线和相应的数据线电连接。 像素电极与有源器件电连接，并且从对应于子像素的子像素区域延伸到数据线上方的位置。

公开(公告)号：US6033589A

公开(公告)日：2000-03-07

申请号：US941713

申请日：1997-09-30

Applicant: Hsiang-Lin Lin

Inventor： Hsiang-Lin Lin

IPC: B05D1/00 ,  H01L21/00 ,  C09D5/20

CPC classification number: H01L21/6715 ,  B05D1/005 ,  H01L21/67051

Abstract: The present invention discloses a method for depositing a coating layer on an article without edge bead formation by integrating the steps of an edge bead rinsing process with a coating spin-out process such that an edge portion of the wafer can be efficiently cleaned with a cleaning solvent when the coating material is still in its liquid state. While the present invention method can be applied to any coating materials and to any coated substrate, it is particularly suitable for cleaning a spin-on-glass material from a semiconductor wafer such that the wafer edge is not coated with a SOG material and thus particulate contamination caused by cracked SOG from the wafer edge can be avoided.

Abstract translation: 本发明公开了一种用于在没有边缘珠形成的物品上沉积涂层的方法，该方法是通过将边缘珠清洗工艺与涂层旋转工艺相结合的步骤整合在一起，使得可以用清洁剂有效地清洁晶片的边缘部分 当涂料仍处于其液态时，溶剂即可。 虽然本发明的方法可以应用于任何涂层材料和任何涂覆的基底，但是特别适用于从半导体晶片清洗旋涂玻璃材料，使得晶片边缘未涂覆有SOG材料，因此颗粒 可以避免由晶片边缘破裂的SOG引起的污染。

公开(公告)号：US5994219A

公开(公告)日：1999-11-30

申请号：US90498

申请日：1998-06-04

Applicant: Hsiang-Lin Lin ,  Han-Chung Chen

Inventor： Hsiang-Lin Lin ,  Han-Chung Chen

IPC: H01L21/285 ,  H01L21/768 ,  H01L21/441

CPC classification number: H01L21/28512 ,  H01L21/76838

Abstract: A new method of metal deposition with reduced metal residue after metal etching by cooling the wafer before metal deposition is described. A first patterned conducting layer is provided overlying a dielectric layer on the surface of a semiconductor substrate. The wafer is cooled to a temperature of less than about 20.degree. C. Thereafter, a metal layer is deposited overlying the first patterned conducting layer. The metal layer is etched away where it is not covered by a mask to complete formation of the metal line. Cooling of the wafer before metal deposition decreases the metal residue found after metal etching.

Abstract translation: 描述了在金属沉积之前通过冷却晶片在金属蚀刻之后金属沉积减少的新方法。 第一图案化导电层设置在半导体衬底的表面上覆盖介电层。 将晶片冷却至低于约20℃的温度。此后，沉积覆盖第一图案化导电层的金属层。 金属层被蚀刻掉，其未被掩模覆盖以完成金属线的形成。 在金属沉积之前，晶片的冷却减少金属蚀刻后发现的金属残留。

公开(公告)号：US09239502B2

公开(公告)日：2016-01-19

申请号：US13541757

申请日：2012-07-04

Applicant: Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Te-Chun Huang ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: G02F1/1343 ,  G02F1/1345 ,  G02F1/1333 ,  H01L27/12 ,  G02F1/1362 ,  G02F1/136

CPC classification number: H01L27/127 ,  G02F1/133345 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2001/13606 ,  G02F2001/136218 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A pixel structure and a manufacturing method thereof are provided. The pixel structure includes a substrate, a scan line, a data line, a first insulating layer, an active device, a second insulating layer, a common electrode and a first pixel electrode. The data line crossed to the scan line is disposed on the substrate and includes a linear transmitting part and a cross-line transmitting part. The first insulating layer covering the scan line and the linear transmitting part is disposed between the scan line and the cross-line transmitting part. The active device, including a gate, an oxide channel, a source and a drain, is connected to the scan line and the data line. The second insulating layer is disposed on the oxide channel and the linear transmitting part. The common electrode is disposed above the linear transmitting part. The first pixel electrode is connected to the drain.

Abstract translation: 提供像素结构及其制造方法。 像素结构包括基板，扫描线，数据线，第一绝缘层，有源器件，第二绝缘层，公共电极和第一像素电极。 与扫描线交叉的数据线设置在基板上，并且包括线性透射部分和交叉线传输部分。 覆盖扫描线的第一绝缘层和线性透射部分设置在扫描线和交叉线传输部分之间。 包括栅极，氧化物通道，源极和漏极的有源器件连接到扫描线和数据线。 第二绝缘层设置在氧化物通道和线性透射部分上。 公共电极设置在线状发送部的上方。 第一像素电极连接到漏极。

公开(公告)号：US08420463B2

公开(公告)日：2013-04-16

申请号：US13163774

申请日：2011-06-20

Applicant: Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

Inventor： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

IPC: H01L21/00 ,  H01L21/84 ,  H01L27/118 ,  H01L23/52

CPC classification number: H01L29/458 ,  H01L27/124 ,  H01L27/1288

Abstract: A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.

Abstract translation: 像素结构包括扫描线，数据线，有源元件，第一钝化层，第二钝化层和像素电极。 数据线包括第一数据金属段和第二数据金属层。 有源元件包括栅电极，绝缘层，沟道层，源极和漏极。 沟道层位于栅电极上方的绝缘层上。 源极和漏极位于沟道层上。 源耦合到数据线。 第一钝化层和第二钝化层覆盖有源元件并形成第一接触孔以暴露漏极的一部分。 第二钝化层覆盖漏极的一部分边缘。 像素电极跨越第二钝化层设置并且经由第一接触孔耦合到漏极。

公开(公告)号：US08405787B2

公开(公告)日：2013-03-26

申请号：US12405247

申请日：2009-03-17

Applicant: Sheng-Chao Liu ,  Hsiang-Lin Lin ,  Kuang-Hsiang Liu ,  Ching-Huan Lin ,  Ming-Tien Lin

Inventor： Sheng-Chao Liu ,  Hsiang-Lin Lin ,  Kuang-Hsiang Liu ,  Ching-Huan Lin ,  Ming-Tien Lin

IPC: G02F1/1343

CPC classification number: H01L27/1255 ,  G02F1/136286 ,  H01L27/1214

Abstract: A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors.

Abstract translation: 三栅极像素结构包括三个子像素区域，三个栅极线，数据线，三个薄膜晶体管（TFT），三个像素电极和公共线。 栅极线沿着第一方向设置，并且数据线沿着第二方向设置。 TFT分别设置在子像素区域中，其中每个TFT具有电连接到相应的栅极线的栅电极，与数据线电连接的源电极和漏电极。 三个像素电极分别设置在三个子像素区域中，并且每个像素电极分别电连接到一个TFT的漏电极。 公共线与栅极线交叉并且部分地重叠三条栅极线，并且公共线和三个像素电极部分地重叠以分别形成三个存储电容器。

公开(公告)号：US08300180B2

公开(公告)日：2012-10-30

申请号：US12493253

申请日：2009-06-29

Applicant: Sung-Kao Liu ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Jen Hu

Inventor： Sung-Kao Liu ,  Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Jen Hu

IPC: G02F1/1333 ,  G02F1/1337 ,  G02F1/1343

CPC classification number: G02F1/133788 ,  G02F2001/133715

Abstract: A liquid crystal display (LCD) panel and a manufacturing method thereof are provided. The manufacturing method includes providing a panel including a first substrate having scan lines, data lines, an active device electrically connecting the scan and data lines, and a pixel electrode electrically connecting the active device, a second substrate having an opposite electrode, and a liquid crystal (LC) layer disposed between the first and the second substrates and having a monomer material. A first curing voltage and a second curing voltage are applied to the scan and data lines, respectively. The second curing voltage is thus transmitted to the pixel electrode. The first curing voltage is higher than an absolute value of the second curing voltage. The monomer material is polymerized to form a first polymer stabilized alignment (PSA) layer between the LC layer and the first substrate and a second PSA layer between the LC layer and the second substrate. The electrical field is then removed.

Abstract translation: 提供一种液晶显示器（LCD）面板及其制造方法。 该制造方法包括提供一种面板，其包括具有扫描线的第一基板，数据线，电连接扫描线和数据线的有源器件，以及电连接有源器件的像素电极，具有相对电极的第二基板和液体 晶体（LC）层，设置在第一和第二基板之间并具有单体材料。 第一固化电压和第二固化电压分别施加到扫描和数据线。 因此，第二固化电压被传输到像素电极。 第一固化电压高于第二固化电压的绝对值。 聚合单体材料以在LC层和第一基底之间形成第一聚合物稳定取向（PSA）层，在LC层和第二基底之间形成第二PSA层。 然后去除电场。

公开(公告)号：US20120218489A1

公开(公告)日：2012-08-30

申请号：US13466195

申请日：2012-05-08

Applicant: Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

Inventor： Liu-Chung Lee ,  Hsiang-Lin Lin ,  Kuo-Yu Huang

IPC: G02F1/136

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F2001/136218 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

Abstract: A liquid crystal display unit structure and the manufacturing method thereof are provided. The liquid crystal display unit structure comprises a patterned first metal layer with a first data line segment and a gate line on a substrate; a patterned dielectric layer covering the first data line and the gate line having a plurality of first openings and a second opening therein, a patterned etch stop layer having a first portion located above the first data line segment and a second portion; a patterned second metal layer including a common electrode line, a second data line segment, a source electrode and a drain electrode, wherein the first portion of the patterned etch stop layer is between the first data line segment and the common line; a patterned passivation layer and a patterned transparent conductive layer.

Abstract translation: 提供了一种液晶显示单元结构及其制造方法。 液晶显示单元结构包括在基板上具有第一数据线段和栅极线的图案化第一金属层; 覆盖第一数据线的图案化介电层和具有多个第一开口和第二开口的栅极线，具有位于第一数据线段上方的第一部分的图案化蚀刻停止层和第二部分; 图案化的第二金属层，包括公共电极线，第二数据线段，源电极和漏电极，其中图案化蚀刻停止层的第一部分在第一数据线段和公共线之间; 图案化钝化层和图案化的透明导电层。

公开(公告)号：US08120838B2

公开(公告)日：2012-02-21

申请号：US12783170

申请日：2010-05-19

Applicant: Hsiang-Lin Lin ,  Wei-Ming Huang ,  Chih-Jen Hu

Inventor： Hsiang-Lin Lin ,  Wei-Ming Huang ,  Chih-Jen Hu

IPC: G02B26/00 ,  G09G3/34

CPC classification number: G09G3/3446 ,  G02F1/167 ,  G02F2001/1676 ,  G09G2300/0434

Abstract: The present invention in one aspect relates to a solar cell formed on a substrate, a bottom electrode member formed on the solar cell, an electrophoretic display panel formed on the bottom electrode member, having a plurality of electrophoretic cell structures spatially arranged in a matrix form, each electrophoretic cell structure containing a plurality of charged particles movable in the electrophoretic cell structure responsively to applied fields, and a top electrode member formed on the electrophoretic display panel, where at least one of the bottom electrode member and the top electrode member includes a plurality of in-plane switching (IPS) electrodes. Each IPS electrode is positioned in relation to a corresponding electrophoretic cell structure for controlling movements of the charged particles therein along a horizontal direction parallel to the electrophoretic display panel.

Abstract translation: 本发明一方面涉及形成在基板上的太阳能电池，形成在太阳能电池上的底部电极部件，形成在底部电极部件上的电泳显示面板，具有以矩阵形式空间排列的多个电泳单元结构体 每个电泳单元结构包含响应于施加场的可在电泳单元结构中移动的多个带电粒子，以及形成在电泳显示面板上的顶电极构件，其中底电极构件和顶电极构件中的至少一个包括 多个平面内切换（IPS）电极。 每个IPS电极相对于相应的电泳池结构定位，用于沿着平行于电泳显示面板的水平方向控制带电粒子在其中的移动。

公开(公告)号：US08071407B2

公开(公告)日：2011-12-06

申请号：US12835874

申请日：2010-07-14

Applicant: Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Han-Tu Lin

Inventor： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Han-Tu Lin

IPC: H01L21/28

CPC classification number: H01L27/1288 ,  H01L27/124

Abstract: An active device array substrate and its fabricating method are provided. According to the subject invention, the elements of an array substrate such as the thin film transistors, gate lines, gate pads, data lines, data pads and storage electrodes, are provided by forming a patterned first metal layer, an insulating layer, a patterned semiconductor layer and a patterned metal multilayer. Furthermore, the subject invention uses the means of selectively etching certain layers. Using the aforesaid means, the array substrate of the subject invention has some layers with under-cut structures, and thus, the number of the time-consuming and complicated mask etching process involved in the production of an array substrate can be reduced. The subject invention provides a relatively simple and time-saving method for producing an array substrate.

Abstract translation: 提供一种有源器件阵列衬底及其制造方法。 根据本发明，诸如薄膜晶体管，栅极线，栅极焊盘，数据线，数据焊盘和存储电极之类的阵列基板的元件通过形成图案化的第一金属层，绝缘层，图案化 半导体层和图案化金属多层。 此外，本发明使用选择性蚀刻某些层的方法。 使用上述方法，本发明的阵列基板具有一些具有欠切割结构的层，因此可以减少与制造阵列基板有关的耗时且复杂的掩模蚀刻工艺的数量。 本发明提供了用于制造阵列基板的相对简单且省时的方法。