Semiconductor device capable of controlling OCD and ODT circuits and control method used by the semiconductor device
    61.
    发明授权
    Semiconductor device capable of controlling OCD and ODT circuits and control method used by the semiconductor device 有权
    能够控制OCD和ODT电路的半导体器件和半导体器件使用的控制方法

    公开(公告)号:US07420387B2

    公开(公告)日:2008-09-02

    申请号:US11402123

    申请日:2006-04-11

    IPC分类号: H03K17/16

    CPC分类号: H03K19/0005

    摘要: Provided is a semiconductor device capable of controlling an on-die-termination (ODT) circuit and an off-chip-driver (OCD) circuit and a control method used by the semiconductor device. The semiconductor device includes a control code generation unit generating a control code in response to a control signal, an addition unit adding an adjustment code to the control code to produce an adjusted control code, and an ODT circuit, wherein an impedance of the ODT circuit is adjusted in response to the adjusted control code. The semiconductor device can adjust the control code more precisely by adding or subtracting the adjustment code to or from the control code. Accordingly, the impedance of an OCD circuit or ODT circuit can be adjusted more precisely.

    摘要翻译: 提供了能够控制芯片上终端(ODT)电路和芯片外驱动器(OCD)电路的半导体器件以及由半导体器件使用的控制方法。 半导体器件包括响应于控制信号产生控制代码的控制代码生成单元,向控制代码添加调整代码以产生调整后的控制代码的加法单元和ODT电路,其中ODT电路的阻抗 根据调整后的控制代码进行调整。 半导体器件可以通过向或从控制代码添加或减去调整代码来更精确地调整控制代码。 因此,可以更精确地调整OCD电路或ODT电路的阻抗。

    Circuit and method for sampling valid command using extended valid address window in double pumped address scheme memory device
    62.
    发明授权
    Circuit and method for sampling valid command using extended valid address window in double pumped address scheme memory device 有权
    在双泵浦地址方案存储器件中使用扩展有效地址窗口采样有效命令的电路和方法

    公开(公告)号:US07394720B2

    公开(公告)日:2008-07-01

    申请号:US11560746

    申请日:2006-11-16

    IPC分类号: G11C8/00

    摘要: Provided are a circuit and method for sampling a valid command using a valid address window extended for a high-speed operation in a double pumped address scheme memory device. A method for extending the valid address window includes: inputting a valid command signal and a first address signal at the first cycle of a clock signal; inputting a second address signal at the second cycle of the clock signal; generating a decoded command signal and extended first and second internal address signals respectively in response to the command signal and the address signals; and latching and decoding the extended first and second internal address signals in response to the decoded command signal.

    摘要翻译: 提供了一种用于在双抽取地址方案存储器件中使用扩展用于高速操作的有效地址窗口来对有效命令进行采样的电路和方法。 扩展有效地址窗口的方法包括:在时钟信号的第一周期输入有效的命令信号和第一地址信号; 在时钟信号的第二周期输入第二地址信号; 响应于命令信号和地址信号分别产生解码的命令信号和扩展的第一和第二内部地址信号; 以及响应于解码的命令信号来锁存和解码扩展的第一和第二内部地址信号。

    Semiconductor memory device having pre-emphasis signal generator
    63.
    发明授权
    Semiconductor memory device having pre-emphasis signal generator 有权
    具有预加重信号发生器的半导体存储器件

    公开(公告)号:US07391238B2

    公开(公告)日:2008-06-24

    申请号:US11429296

    申请日:2006-05-05

    IPC分类号: H03K19/094 H03K19/0175

    摘要: A semiconductor memory device includes a primary output driver which outputs a data signal through an output terminal; a secondary output driver which is connected to the output terminal and performs a pre-emphasis operation; and a pre-emphasis signal generator which outputs a pre-emphasis signal to enable the secondary output driver The pre-emphasis signal generator includes a auto pulse generator which generates an auto pulse in response to a transition of a control signal; a delay circuit which receives the auto pulse output from the auto pulse generator, delays the auto pulse by a predetermined period, and outputs a pre-emphasis signal; and a delay control unit which applies a delay control signal to the delay circuit and controls a delay amount of the delay circuit.

    摘要翻译: 半导体存储器件包括通过输出端输出数据信号的初级输出驱动器; 二次输出驱动器,其连接到输出端子并执行预加重操作; 以及预加重信号发生器,其输出预加重信号以使得辅助输出驱动器。预加重信号发生器包括自动脉冲发生器,其响应于控制信号的转变而产生自动脉冲; 接收从自动脉冲发生器输出的自动脉冲的延迟电路将自动脉冲延迟预定周期,并输出预加重信号; 以及延迟控制单元,其向延迟电路施加延迟控制信号并控制延迟电路的延迟量。

    Methods of Measuring Frequencies Including Charging Electrical Circuits
    64.
    发明申请
    Methods of Measuring Frequencies Including Charging Electrical Circuits 审中-公开
    测量包括充电电路在内的频率的方法

    公开(公告)号:US20070185670A1

    公开(公告)日:2007-08-09

    申请号:US11733220

    申请日:2007-04-10

    IPC分类号: G01R23/00

    CPC分类号: G11C7/22 G11C7/16 G11C7/222

    摘要: A method of measuring a frequency of an input clock signal may include generating an output pulse responsive to an edge of the input clock signal, and charging an electrical circuit responsive to the output pulse. An analog output signal may be generated responsive to the charged electrical circuit, and the analog output signal may be converted into a digital value representing a frequency of the input clock signal. Related frequency measuring circuits and memory devices are also discussed.

    摘要翻译: 测量输入时钟信号的频率的方法可以包括响应于输入时钟信号的边缘产生输出脉冲,以及响应于输出脉冲对电路充电。 可以响应于充电的电路产生模拟输出信号,并且模拟输出信号可以被转换成表示输入时钟信号的频率的数字值。 还讨论了相关的频率测量电路和存储器件。

    Input buffer having a stabilized operating point and an associated method
    65.
    发明授权
    Input buffer having a stabilized operating point and an associated method 失效
    输入缓冲器具有稳定的工作点和相关联的方法

    公开(公告)号:US07205799B2

    公开(公告)日:2007-04-17

    申请号:US11225915

    申请日:2005-09-13

    IPC分类号: H03K3/00

    CPC分类号: H03F3/45

    摘要: We describe an input buffer having a stabilized operating point and an associated method. An input buffer may include a first differential amplifying unit to generate a first output signal having a first operating point and a second differential amplifying unit to generate a second output signal having a second operating point. An output control circuit varies respective weights of the first and second output signals responsive to an output control signal. The first differential amplifying unit may operate responsive to a reference voltage and an input voltage signal. The second differential amplifying unit may operate responsive to the reference voltage and the input voltage signal. The first operating point may be relatively higher than the second operating point.

    摘要翻译: 我们描述具有稳定的工作点和相关方法的输入缓冲器。 输入缓冲器可以包括第一差分放大单元,用于产生具有第一工作点的第一输出信号和第二差分放大单元,以产生具有第二工作点的第二输出信号。 响应于输出控制信号,输出控制电路改变第一和第二输出信号的各个权重。 第一差分放大单元可以响应于参考电压和输入电压信号而进行操作。 第二差分放大单元可以响应于参考电压和输入电压信号而工作。 第一工作点可以相对高于第二工作点。

    Semiconductor device capable of controlling OCD and ODT circuits and control method used by the semiconductor device
    66.
    发明申请
    Semiconductor device capable of controlling OCD and ODT circuits and control method used by the semiconductor device 有权
    能够控制OCD和ODT电路的半导体器件和半导体器件使用的控制方法

    公开(公告)号:US20060226868A1

    公开(公告)日:2006-10-12

    申请号:US11402123

    申请日:2006-04-11

    IPC分类号: H03K19/003

    CPC分类号: H03K19/0005

    摘要: Provided is a semiconductor device capable of controlling an on-die-termination (ODT) circuit and an off-chip-driver (OCD) circuit and a control method used by the semiconductor device. The semiconductor device includes a control code generation unit generating a control code in response to a control signal, an addition unit adding an adjustment code to the control code to produce an adjusted control code, and an ODT circuit, wherein an impedance of the ODT circuit is adjusted in response to the adjusted control code. The semiconductor device can adjust the control code more precisely by adding or subtracting the adjustment code to or from the control code. Accordingly, the impedance of an OCD circuit or ODT circuit can be adjusted more precisely.

    摘要翻译: 提供了能够控制芯片上终端(ODT)电路和芯片外驱动器(OCD)电路的半导体器件以及由半导体器件使用的控制方法。 半导体器件包括响应于控制信号产生控制代码的控制代码生成单元,向控制代码添加调整代码以产生调整后的控制代码的加法单元和ODT电路,其中ODT电路的阻抗 根据调整后的控制代码进行调整。 半导体器件可以通过向或从控制代码添加或减去调整代码来更精确地调整控制代码。 因此,可以更精确地调整OCD电路或ODT电路的阻抗。

    Display apparatus
    67.
    发明申请
    Display apparatus 审中-公开
    显示装置

    公开(公告)号:US20060076881A1

    公开(公告)日:2006-04-13

    申请号:US11247884

    申请日:2005-10-10

    IPC分类号: H01J63/04 H01J1/62

    摘要: A display apparatus includes a top substrate, a middle substrate, and a bottom substrate. The top substrate includes a first substrate. The middle substrate includes a second substrate, an anode electrode and a fluorescent layer. The second substrate includes an upper surface facing the first substrate and a lower surface that is opposite to the upper surface. An array layer is formed on either the upper surface of the second substrate or a lower surface of the first substrate. The anode electrode is formed on the lower surface of the second substrate. The fluorescent layer is formed on the anode electrode. The bottom substrate includes a third substrate and a cathode electrode formed on the third substrate such that the cathode electrode faces the fluorescent layer. Therefore, a thickness may be reduced and luminance of a light may be enhanced.

    摘要翻译: 显示装置包括顶部基板,中间基板和底部基板。 顶部衬底包括第一衬底。 中间基板包括第二基板,阳极电极和荧光层。 第二基板包括面向第一基板的上表面和与上表面相对的下表面。 在第二基板的上表面或第一基板的下表面上形成阵列层。 阳极电极形成在第二基板的下表面上。 荧光层形成在阳极电极上。 底部基板包括形成在第三基板上的第三基板和阴极,使得阴极面对荧光层。 因此,可以减小厚度,并且可以提高光的亮度。

    Input buffer having a stabilized operating point and an associated method
    68.
    发明申请
    Input buffer having a stabilized operating point and an associated method 失效
    输入缓冲器具有稳定的工作点和相关联的方法

    公开(公告)号:US20060066364A1

    公开(公告)日:2006-03-30

    申请号:US11225915

    申请日:2005-09-13

    IPC分类号: H03B1/00

    CPC分类号: H03F3/45

    摘要: We describe an input buffer having a stabilized operating point and an associated method. An input buffer may include a first differential amplifying unit to generate a first output signal having a first operating point and a second differential amplifying unit to generate a second output signal having a second operating point. An output control circuit varies respective weights of the first and second output signals responsive to an output control signal. The first differential amplifying unit may operate responsive to a reference voltage and an input voltage signal. The second differential amplifying unit may operate responsive to the reference voltage and the input voltage signal. The first operating point may be relatively higher than the second operating point.

    摘要翻译: 我们描述具有稳定的工作点和相关方法的输入缓冲器。 输入缓冲器可以包括:第一差分放大单元,用于产生具有第一工作点的第一输出信号和第二差分放大单元,以产生具有第二工作点的第二输出信号。 响应于输出控制信号,输出控制电路改变第一和第二输出信号的各个权重。 第一差分放大单元可以响应于参考电压和输入电压信号而进行操作。 第二差分放大单元可以响应于参考电压和输入电压信号而工作。 第一工作点可以相对高于第二工作点。

    Positive-displacement oil pump
    69.
    发明授权
    Positive-displacement oil pump 有权
    正排量油泵

    公开(公告)号:US06840747B2

    公开(公告)日:2005-01-11

    申请号:US10355382

    申请日:2003-01-30

    摘要: A positive-displacement oil pump is disclosed. In the oil pump, an insert body is fitted into a central opening of a shaft body to a height of an oil-feeding hole. The insert body is rotated along with the shaft body, and includes a central hole formed in the insert body, a cylindrical lip formed around an outlet of the central hole, a fluid discharge diode provided in an inlet of the central hole, and an inclined groove formed around an outer circumferential surface of the insert body such that the inclined groove forms a closed curve. A piston is movably fitted over the insert body such that the piston is axially moved while changing a volume of a displacement space defined between the insert body and the piston.

    摘要翻译: 公开了一种正排量油泵。 在油泵中,将插入体装配到轴体的中心开口至供油孔的高度。 插入体与轴体一起旋转,并且包括形成在插入体中的中心孔,形成在中心孔的出口周围的圆筒形唇部,设置在中心孔的入口中的流体排出二极管和倾斜 所述槽形成在所述插入体的外周表面周围,使得所述倾斜槽形成闭合曲线。 活塞可移动地装配在插入体上,使得活塞轴向移动,同时改变限定在插入体和活塞之间的位移空间的体积。