公开(公告)号：US07187585B2

公开(公告)日：2007-03-06

申请号：US11099049

申请日：2005-04-05

申请人： Yan Li ,  Jian Chen

发明人： Yan Li ,  Jian Chen

IPC分类号： G11C7/00

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3422

摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). The problem occurs most pronouncedly between sets of adjacent memory cells that have been programmed at different times. To compensate for this coupling, the read process for a given memory cell will take into account the programmed state of an adjacent memory cell.

公开(公告)号：US20060221714A1

公开(公告)日：2006-10-05

申请号：US11099049

申请日：2005-04-05

申请人： Yan Li ,  Jian Chen

发明人： Yan Li ,  Jian Chen

IPC分类号： G11C7/10

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3422

摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). The problem occurs most pronouncedly between sets of adjacent memory cells that have been programmed at different times. To compensate for this coupling, the read process for a given memory cell will take into account the programmed state of an adjacent memory cell.

摘要翻译： 存在于非易失性存储单元的浮动栅极（或其他电荷存储元件）上的表观电荷的变化可能发生，因为基于存储在相邻浮动栅极（或其它相邻电荷存储元件）中的电荷的电场的耦合 ）。 在不同时间编程的相邻存储器单元组之间最明显地出现该问题。 为了补偿该耦合，给定存储器单元的读取过程将考虑相邻存储器单元的编程状态。

公开(公告)号：US20050207222A1

公开(公告)日：2005-09-22

申请号：US11124709

申请日：2005-05-09

申请人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

发明人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/34

CPC分类号： G11C16/3463 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459

摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

公开(公告)号：US20050024943A1

公开(公告)日：2005-02-03

申请号：US10628962

申请日：2003-07-29

申请人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

发明人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

IPC分类号： G11C16/34 ,  G11C11/34

CPC分类号： G11C16/3404 ,  G11C16/3454

摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

摘要翻译： 在非易失性半导体存储器系统（或其他类型的存储器系统）中，通过改变该存储器单元的阈值电压对存储器单元进行编程。 由于系统中不同存储器单元的编程速度的变化，存在一些存储器单元将被过度编程的可能性。 也就是说，在一个示例中，阈值电压将被移动超过预期值或值的范围。 本发明包括确定存储器单元是否被过度编程。

公开(公告)号：US20050024939A1

公开(公告)日：2005-02-03

申请号：US10629068

申请日：2003-07-29

申请人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

发明人： Jian Chen ,  Yan Li ,  Jeffrey Lutze

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/34 ,  G11C11/34

CPC分类号： G11C16/3463 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459

摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

摘要翻译： 在非易失性半导体存储器系统（或其他类型的存储器系统）中，通过改变该存储器单元的阈值电压对存储器单元进行编程。 由于系统中不同存储器单元的编程速度的变化，存在一些存储器单元将被过度编程的可能性。 也就是说，在一个示例中，阈值电压将被移动超过预期值或值的范围。 本发明包括确定存储器单元是否被过度编程。

公开(公告)号：US20130070530A1

公开(公告)日：2013-03-21

申请号：US13622045

申请日：2012-09-18

申请人： Jian Chen ,  Sergei Gorobets ,  Steven Sprouse ,  Tien-Chien Kuo ,  Yan Li ,  Seungpil Lee ,  Alex Mak ,  Deepanshu Dutta ,  Masaaki Higashitani

发明人： Jian Chen ,  Sergei Gorobets ,  Steven Sprouse ,  Tien-Chien Kuo ,  Yan Li ,  Seungpil Lee ,  Alex Mak ,  Deepanshu Dutta ,  Masaaki Higashitani

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C5/063 ,  G11C11/5628 ,  G11C2211/5641

摘要： A non-volatile storage system is disclosed that includes non-volatile memory cells designed for high endurance and lower retention than other non-volatile memory cells.

摘要翻译： 公开了一种非易失性存储系统，其包括设计用于高耐久性和比其他非易失性存储器单元更低保持性的非易失性存储器单元。

公开(公告)号：US20110126080A1

公开(公告)日：2011-05-26

申请号：US12839237

申请日：2010-07-19

申请人： Jun Wan ,  Alex Mak ,  Tien-Chien Kuo ,  Yan Li ,  Jian Chen

发明人： Jun Wan ,  Alex Mak ,  Tien-Chien Kuo ,  Yan Li ,  Jian Chen

IPC分类号： G06F12/02 ,  H03M13/05 ,  G06F11/10

CPC分类号： G11C11/5642 ,  G11C11/5628 ,  G11C29/00

摘要： Non-volatile storage devices and techniques for operating non-volatile storage are described herein. One embodiment includes accessing “n” pages of data to be programmed into a group of non-volatile storage elements. The “n” pages are mapped to a data state for each of the non-volatile storage elements based on a coding scheme that evenly distributes read errors across the “n” pages of data. Each of the non-volatile storage elements in the group are programmed to a threshold voltage range based on the data states to which the plurality of pages have been mapped. The programming may include programming the “n” pages simultaneously. In one embodiment, mapping the plurality of pages is based on a coding scheme that distributes a significant failure mode (for example, program disturb errors) to a first of the pages and a significant failure mode (for example, data retention errors) to a second of the pages.

摘要翻译： 本文描述了用于操作非易失性存储器的非易失性存储设备和技术。 一个实施例包括访问要编程到一组非易失性存储元件中的“n”页数据。 基于在“n”页数据上均匀分布读取错误的编码方案，将“n”个页映射到每个非易失性存储元件的数据状态。 基于已经映射了多个页面的数据状态，组中的每个非易失性存储元件被编程到阈值电压范围。 编程可以包括同时对“n”页进行编程。 在一个实施例中，映射多个页面是基于将显着的故障模式（例如，程序干扰错误）分配给第一页面的编码方案和将重大故障模式（例如，数据保留错误）分配给 第二页。

公开(公告)号：US07414886B2

公开(公告)日：2008-08-19

申请号：US11616778

申请日：2006-12-27

申请人： Yan Li ,  Jian Chen

发明人： Yan Li ,  Jian Chen

IPC分类号： G11C16/26

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3422

摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). The problem occurs most pronouncedly between sets of adjacent memory cells that have been programmed at different times. To compensate for this coupling, the read process for a given memory cell will take into account the programmed state of an adjacent memory cell.

公开(公告)号：US20080043526A1

公开(公告)日：2008-02-21

申请号：US11923126

申请日：2007-10-24

申请人： Yan Li ,  Jian Chen ,  Raul-Adrian Cernea

发明人： Yan Li ,  Jian Chen ,  Raul-Adrian Cernea

IPC分类号： G11C16/04

CPC分类号： G11C16/3427 ,  G11C16/0483 ,  G11C16/12 ,  G11C16/28 ,  G11C16/3418

摘要： The present invention presents a non-volatile memory having a plurality of erase units or blocks, where each block is divided into a plurality of parts sharing the same word lines to save on the row decoder area, but which can be read or programmed independently. An exemplary embodiment is a Flash EEPROM memory with a NAND architecture that has blocks composed of a left half and a right half, where each part will accommodate one or more standard page (data transfer unit) sizes of 512 bytes of data. In the exemplary embodiment, the left and right portions of a block each have separate source lines, and separate sets of source and drain select lines. During the programming or reading of the left side, as an example, the right side can be biased to produce channel boosting to reduce data disturbs. In an alternate set of embodiments, the parts can have separate well structures.

摘要翻译： 本发明提供了一种具有多个擦除单元或块的非易失性存储器，其中每个块被分成多个部分，共享相同的字线以保存在行解码器区域上，但可独立地读取或编程。 一个示例性实施例是具有NAND架构的闪存EEPROM存储器，其具有由左半部分和右半部分组成的块，其中每个部分将容纳512字节数据的一个或多个标准页面（数据传送单元）大小。 在示例性实施例中，块的左侧和右侧部分各自具有分离的源极线，以及分离的源极和漏极选择线组。 在左侧的编程或读取期间，作为示例，右侧可以被偏置以产生信道增强以减少数据干扰。 在另一组实施例中，这些部件可以具有单独的井结构。

公开(公告)号：US07301839B2

公开(公告)日：2007-11-27

申请号：US11616769

申请日：2006-12-27

申请人： Yan Li ,  Jian Chen

发明人： Yan Li ,  Jian Chen

IPC分类号： G11C7/00

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3422

摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). The problem occurs most pronouncedly between sets of adjacent memory cells that have been programmed at different times. To compensate for this coupling, the read process for a given memory cell will take into account the programmed state of an adjacent memory cell.