公开(公告)号：US07428671B2

公开(公告)日：2008-09-23

申请号：US10452482

申请日：2003-06-02

申请人： Johann Pfeiffer ,  Helmut Fischer

发明人： Johann Pfeiffer ,  Helmut Fischer

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C29/26 ,  G11C11/401 ,  G11C2029/1206

摘要： A memory module has a memory cell configuration. For the purpose of testing the memory cell configuration, the memory module has a test structure with at least two test circuits, which are disposed in a distributed fashion on the memory module and are connected to one another via a common test switching bus, which can be connected to an address bus of the memory module via a decoupling circuit during a test operation.

摘要翻译： 存储器模块具有存储单元配置。 为了测试存储器单元配置，存储器模块具有测试结构，其具有至少两个测试电路，它们以分布的方式设置在存储器模块上，并且通过公共测试开关总线彼此连接，这可以 在测试操作期间通过去耦电路连接到存储器模块的地址总线。

公开(公告)号：US20080011041A1

公开(公告)日：2008-01-17

申请号：US11629018

申请日：2005-06-06

申请人： Helmut Fischer

发明人： Helmut Fischer

IPC分类号： G01B7/06

CPC分类号： G01B7/105

摘要： The invention relates to a calibrating device for adapting a measuring device for measuring the thickness of thin layers on an object to be measured, comprising a calibrating surface (12) having a flat upper side and a flat underside, which are provided at a distance with a predetermined thickness, characterized in that the calibrating surface (12) is arranged separate from at least one edge area (18) and the calibrating surface (12) is connected to the at least one edge area (18) via at least one transition area (14).

摘要翻译： 本发明涉及一种用于调整测量装置的校准装置，用于测量待测物体上的薄层的厚度，包括：具有平坦的上侧和平的下侧的校准表面（12），该校准表面（12）与 其特征在于，所述校准表面（12）与至少一个边缘区域（18）分开布置，并且所述校准表面（12）经由至少一个过渡区域（18）连接到所述至少一个边缘区域 （14）。

公开(公告)号：US07317603B2

公开(公告)日：2008-01-08

申请号：US11389540

申请日：2006-03-27

申请人： Helmut Fischer ,  Jürgen Lindolf ,  Michael Bernhard Sommer

发明人： Helmut Fischer ,  Jürgen Lindolf ,  Michael Bernhard Sommer

IPC分类号： H02H9/00

CPC分类号： H01L27/0266

摘要： An integrated circuit with electrostatic discharge protection includes a first transistor with a source terminal, a drain terminal and a gate terminal, and a second transistor with a source terminal, a drain terminal and a gate terminal. The gate terminal for each of the first and second transistors is connected to the drain terminal. The first transistor is connected in series with the second transistor by one of the drain and source terminals of the first transistor being connected to one of the drain and source terminals of the second transistor. The series circuit formed by the transistors is connected to an input terminal of the integrated circuit or to a supply terminal and a terminal that applies the reference potential of the integrated circuit. The series circuit of the transistors is dimensioned by the number of transistors and the setting of the channel length and channel width ratios of the transistors.

摘要翻译： 具有静电放电保护的集成电路包括具有源极端子，漏极端子和栅极端子的第一晶体管以及具有源极端子，漏极端子和栅极端子的第二晶体管。 第一和第二晶体管中的每一个的栅极端子连接到漏极端子。 第一晶体管与第二晶体管串联连接，第一晶体管的漏极和源极之一连接到第二晶体管的漏极和源极端之一。 由晶体管形成的串联电路连接到集成电路的输入端子，或连接到施加集成电路的基准电位的电源端子和端子。 晶体管的串联电路由晶体管的数量和晶体管的沟道长度和沟道宽度比的设置来确定。

公开(公告)号：US20070289361A1

公开(公告)日：2007-12-20

申请号：US11803703

申请日：2007-05-15

申请人： Helmut Fischer

发明人： Helmut Fischer

IPC分类号： G01B13/06

CPC分类号： G01B7/105

摘要： The invention relates to a method and an apparatus for measurement of the thickness of thin layers by means of a measurement probe (11) which has a housing (14) which holds at least one sensor element (17) whose longitudinal axis lies parallel to or on a longitudinal axis (16) of the housing (14), in which at least during the measurement process, a gaseous medium is supplied to a supply opening (21) of the measurement probe (11) on a measurement surface (28), and is supplied via at least one connection channel (24), which is connected to the supply opening (21), to one or more outlet openings (26) which are provided on an end face (29), pointing towards the measurement surface (28), of the measurement probe (11), and in which at least one mass flow, which flows out of one or more outlet openings (26), of the gaseous medium is directed at the measurement surface (28), and in which the measurement probe (11) is held in a non-contacting manner with respect to the measurement surface (28) during the measurement process.

摘要翻译： 本发明涉及一种用于通过测量探头（11）测量薄层厚度的方法和装置，所述测量探针具有壳体（14），该壳体保持至少一个传感器元件（17），所述传感器元件的纵轴线平行于 在所述壳体（14）的纵轴（16）上，至少在测量过程期间，在测量表面（28）上向所述测量探针（11）的供应开口（21）供应气态介质， 并经由连接到供应开口（21）的至少一个连接通道（24）供应到设置在端面（29）上的一个或多个出口开口（26），该端面指向测量表面 28），其中从所述气体介质的一个或多个出口（26）流出的至少一个质量流指向所述测量表面（28），并且其中 测量探头（11）以非接触方式保持 在测量过程中测量表面（28）。

公开(公告)号：US07009908B2

公开(公告)日：2006-03-07

申请号：US09907758

申请日：2001-07-18

申请人： Helmut Fischer

发明人： Helmut Fischer

IPC分类号： G11C8/00

CPC分类号： G11C11/22 ,  G11C11/4085 ,  G11C11/4087

摘要： A decoding device includes a final decoder having at least one field-controlled semiconductor switching device. A transmission signal has a characteristic curve such that, in the event of an inactivation of the field-controlled semiconductor switching device, it is substantially completely blocked for transmission of a transmission signal by applying the transmission signal to the semiconductor switching device. Thus a particularly reliable operation of the decoding device is achieved.

公开(公告)号：US06928024B2

公开(公告)日：2005-08-09

申请号：US10639379

申请日：2003-08-12

申请人： Johann Pfeiffer ,  Helmut Fischer

发明人： Johann Pfeiffer ,  Helmut Fischer

IPC分类号： G11C7/10 ,  G11C11/4076 ,  G11C11/4096 ,  G11C8/00

CPC分类号： G11C7/1066 ,  G11C7/1006 ,  G11C7/1012 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1078 ,  G11C7/1087 ,  G11C11/4076 ,  G11C11/4096 ,  G11C2207/002

摘要： A RAM memory circuit has at least one memory bank with a multiplicity of memory cells arranged like a matrix in rows and columns and is subdivided into q≧2 areas, each of which comprises p≧1 segments each comprising a plurality of columns. Each segment is assigned a bundle of master data lines, which branches from an area bus assigned to the relevant area and, for its part, branches via a switching network to the memory cells of the relevant segment. The area buses can be connected cyclically to a common data port. In order to allow a read operation the beginning of which overlaps the end of a preceding write operation, each master data line bundle has coupled to it a data latch for holding the data respectively appearing there, and an isolating switch is in each case provided between each master data line bundle and the assigned area bus.

摘要翻译： RAM存储器电路具有至少一个存储体，存储单元排列成行和列中的矩阵，并被细分为q≥2个区域，每个区域包括每个包括多个列的p≥1个区段。 每个段被分配一束主数据线，其从分配给相关区域的区域总线分支，并且其一部分通过交换网络分支到相关段的存储器单元。 区域总线可以循环连接到公共数据端口。 为了允许其开始与先前写入操作的结束重叠的读取操作，每个主数据线束已经耦合到其上用于保持分别出现在那里的数据的数据锁存器，并且隔离开关分别位于 每个主数据线束和分配区总线。

公开(公告)号：US06903620B2

公开(公告)日：2005-06-07

申请号：US10452477

申请日：2003-06-02

申请人： Ullrich Menczigar ,  Helmut Fischer

发明人： Ullrich Menczigar ,  Helmut Fischer

IPC分类号： H01L23/522 ,  H01L23/64 ,  H01L27/06 ,  H03H7/38

CPC分类号： H01L23/5223 ,  H01L23/5228 ,  H01L23/647 ,  H01L27/0676 ,  H01L2223/6655 ,  H01L2924/0002 ,  H01L2924/19015 ,  H01L2924/00

摘要： An RC network is integrated in a semiconductor circuit chip and is connected between an input pad or pin and a ground node coupled to a substrate of the chip. The RC network has a plurality of resistance elements, a plurality of capacitance elements and a plurality of connection/isolation elements, which are provided in each case between at least one of the resistance elements and the individual capacitive elements. The inventive circuit configuration enables an optional and independent setting of the input capacitance and of the input resistance of the semiconductor circuit chip, depending on the connection/isolation state of the connection/isolation elements.

摘要翻译： RC网络集成在半导体电路芯片中，并连接在输入焊盘或引脚与耦合到芯片的基板的接地节点之间。 RC网络具有多个电阻元件，多个电容元件和多个连接/隔离元件，它们分别设置在至少一个电阻元件和各个电容元件之间。 根据连接/隔离元件的连接/隔离状态，本发明的电路配置能够实现输入电容和半导体电路芯片的输入电阻的可选和独立设置。

公开(公告)号：US20050099745A1

公开(公告)日：2005-05-12

申请号：US10928754

申请日：2004-08-27

申请人： Helmut Fischer ,  Jurgen Lindolf ,  Michael Sommer

发明人： Helmut Fischer ,  Jurgen Lindolf ,  Michael Sommer

IPC分类号： H01L23/60 ,  H01L27/02 ,  H02H9/00 ,  H02H9/02

CPC分类号： H01L27/0255

摘要： An ESD protection apparatus for limiting a voltage superimposed on an electric useful voltage to an allowable voltage, comprising a plurality of series-connected diodes. The diodes are forward-biased with reference to the useful voltage. Each individual forward-biased diode has a threshold voltage. The sum of the threshold voltages of the series-connected diodes corresponds to the allowable voltage.

摘要翻译： 一种用于将叠加在电用电压上的电压限制为允许电压的ESD保护装置，包括多个串联二极管。 参考有用电压，二极管正向偏置。 每个单独的正向偏置二极管具有阈值电压。 串联二极管的阈值电压的总和对应于容许电压。

公开(公告)号：US06824657B1

公开(公告)日：2004-11-30

申请号：US09889704

申请日：2002-01-14

申请人： Helmut Fischer

发明人： Helmut Fischer

IPC分类号： C25B900

CPC分类号： C25D17/06

摘要： A component carrier for holding at least one component (12), in particular for surface coating by electrodeposition, having at least one holding magnet (31), the magnetic field lines of which run through the component (12) in a region close to a contact surface (36), having a diaphragm (16), which accommodates the at least one component (12) in a holding position (38) with respect to the at least one holding magnet (31) on at least one contact surface (36) of an electrically conductive housing (14), the pole axis of the at least one holding magnet (31) being positioned transversely with respect to the contact surface (36), in which component carrier a resulting magnetic holding force which acts on the at least one component (12) in the holding position (38) can be reduced by displacement of the at least one holding magnet (36) out of the holding position (38) or by displacement of the at least one component (12) out of the holding position (38) or by a relative movement of the at least one component (12) and the at least one holding magnet (31) with respect to the holding position (38).

摘要翻译： 用于保持至少一个部件（12）的部件载体，特别是用于通过电沉积来表面涂覆，所述部件载体具有至少一个保持磁体（31），所述保持磁体（31）的磁场线穿过所述部件（12）在靠近 接触表面（36），其具有隔膜（16），其将至少一个部件（12）相对于所述至少一个保持磁体（31）容纳在至少一个接触表面（36）上的保持位置（38）中 ），所述至少一个保持磁体（31）的极轴相对于所述接触表面（36）横向定位，在所述接触表面（36）中，所述至少一个保持磁体（31）的极轴作用在所述接触表面 保持位置（38）中的至少一个部件（12）可以通过至少一个保持磁体（36）移出保持位置（38）的位移或通过至少一个部件（12）的位移而脱离 保持位置（38）或通过至少的相对运动 一个部件（12）和至少一个保持磁体（31）相对于保持位置（38）。

公开(公告)号：US06788606B2

公开(公告)日：2004-09-07

申请号：US10284806

申请日：2002-10-31

申请人： Heiko Fibranz ,  Helmut Fischer

发明人： Heiko Fibranz ,  Helmut Fischer

IPC分类号： G11C700

CPC分类号： G11C11/406

摘要： In a memory element with a first number of memory cells having a first retention time for holding a content of the memory cells and a second number of memory cells having a second retention time for holding the content of the memory cell, a method for refreshing the memory cells comprises a step of refreshing the first number of memory cells when reaching the first retention time and a step of refreshing the second number of memory cells when reaching the second retention time. An apparatus for refreshing the memory cells of the memory element is provided for refreshing the first number of memory cells when reaching the first retention time, and for refreshing the second number of memory cells when reaching the second retention time.

摘要翻译： 在具有第一数量的存储单元的存储元件中，具有用于保持存储单元的内容的第一保留时间和具有用于保持存储单元的内容的第二保留时间的第二数量的存储单元， 存储单元包括当达到第一保留时间时刷新第一数量的存储器单元的步骤以及在达到第二保留时间时刷新第二数量的存储器单元的步骤。 提供用于刷新存储元件的存储单元的装置，用于在达到第一保留时间时刷新第一数量的存储单元，并且用于在达到第二保留时间时刷新第二数量的存储单元。