公开(公告)号：US11361801B2

公开(公告)日：2022-06-14

申请号：US16834835

申请日：2020-03-30

Applicant: Micron Technology, Inc.

Inventor： Paolo Fantini ,  Paolo Amato ,  Marco Sforzin

IPC: G11C7/00 ,  G11C7/06 ,  G11C16/10 ,  G11C13/00 ,  G11C16/26

Abstract: An apparatus has an array of memory cells and a controller coupled to the array. The controller is configured to track a sub-threshold leakage current through a number of memory cells of the array and determine a threshold voltage based on the sub-threshold leakage current.

公开(公告)号：US20220179736A1

公开(公告)日：2022-06-09

申请号：US17541956

申请日：2021-12-03

Applicant: Micron Technology, Inc.

Inventor： Marco Sforzin ,  Paolo Amato ,  Daniele Balluchi

IPC: G06F11/10

Abstract: Systems, apparatuses, and methods related to modified parity data using a poison data unit. An example method can include receiving, from a controller of a memory device, a first set of bits including data and a second set of at least one bit indicating whether the first set of bits comprises one or more erroneous or corrupted bits. The method can further include generating, at an encoder of the memory device, parity data associated with the first set of bits. The method can further include generating, at logic of the memory device, modified parity data with the parity data component and the second set of at least one bit. The method can further include writing the first set of bits and the modified parity data in an array of the memory device.

公开(公告)号：US11282571B2

公开(公告)日：2022-03-22

申请号：US17165579

申请日：2021-02-02

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Marco Sforzin ,  Alessandro Orlando

IPC: G11C16/28 ,  G11C11/56 ,  G11C16/32 ,  G11C16/30 ,  G11C8/14 ,  G11C16/08 ,  G11C13/00 ,  G11C7/14

Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a certain number bits having a first logic state prior to storing the user data in memory cells. Subsequently, reading the encoded user data may be carried out by applying a read voltage to the memory cells while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. The auto-referenced read may identify a particular switching event that correlates to a median threshold voltage value of the subset of the memory cells. Then, the auto-referenced read may determine a reference voltage that takes into account a statistical property of threshold voltage distribution of the subset of the memory cells. The auto-referenced read may identify a time duration to maintain the read voltage based on determining the reference voltage. When the time duration expires, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.

公开(公告)号：US11158363B2

公开(公告)日：2021-10-26

申请号：US16110601

申请日：2018-08-23

Applicant: Micron Technology, Inc.

Inventor： Marco Sforzin ,  Paolo Amato

IPC: G11C16/10 ,  G11C11/406 ,  G05F3/26 ,  G11C16/04 ,  G11C16/34 ,  G11C13/00 ,  G11C16/32

Abstract: The present disclosure includes apparatuses and methods related to refresh in memory. An example apparatus can refresh an array of memory cells in response to a portion of memory cells in an array having threshold voltages that are greater than a reference voltage.

公开(公告)号：US20210319829A1

公开(公告)日：2021-10-14

申请号：US16846481

申请日：2020-04-13

Applicant: Micron Technology, Inc.

Inventor： Daniele Balluchi ,  Paolo Amato ,  Graziano Mirichigni ,  Danilo Caraccio ,  Marco Sforzin ,  Marco Dallabora

IPC: G11C13/00

Abstract: An apparatus can have a memory comprising an array of resistance variable memory cells and a controller. The controller can be configured to receive to a dedicated command to write all cells in a number of groups of the resistance variable memory cells to a first state without transferring any host data corresponding to the first state to the number of groups. The controller can be configured to, in response to the dedicated command, perform a read operation on each respective group to determine states of the cells in each respective group, determine from the read operation any cells in each respective group programmed to a second state, and write only the cells determined to be in the second state to the first state.

公开(公告)号：US10733046B2

公开(公告)日：2020-08-04

申请号：US15958401

申请日：2018-04-20

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Marco Sforzin ,  Paolo Amato ,  Danilo Caraccio

IPC: H03M13/00 ,  G06F11/10 ,  G06F9/46 ,  G06F13/16

Abstract: Apparatuses and methods related to providing transaction metadata. Providing transaction metadata includes providing an address of data stored in the memory device using an address bus coupled to the memory device and the controller. Providing transaction metadata also includes transferring the data, associated with the address, from the memory device using a data bus coupled to the memory device and the controller. Providing transaction metadata further includes transferring a sideband signal synchronously with the data bus and in conjunction with the address bus using a transaction metadata bus coupled to the memory device and the controller.

公开(公告)号：US20200226020A1

公开(公告)日：2020-07-16

申请号：US16834198

申请日：2020-03-30

Applicant: Micron Technology, Inc.

Inventor： Paolo Amato ,  Marco Sforzin

IPC: G06F11/10 ,  H03M13/29 ,  H03M13/11

Abstract: Apparatuses and methods related to correcting errors can include using FD decoders and AD decoders. Correcting errors can include receiving input data from the memory array, performing a plurality of operations associated with an error detection on the input data, and providing, based on processing the input data, output data, a validation flag, and a plurality of parity bits to a second decoder hosted by a controller coupled to the memory device.

公开(公告)号：US20200035297A1

公开(公告)日：2020-01-30

申请号：US16536120

申请日：2019-08-08

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Paolo Amato ,  Federico Pio ,  Alessandro Orlando ,  Marco Sforzin

IPC: G11C13/00 ,  G11C11/56 ,  H01L45/00 ,  H01L27/24

Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a predetermined number of bits having a first logic state prior to storing the user data in memory cells. The auto-referenced read may store a total number of bits of the user data having a first logic state in a separate set of memory cells. Subsequently, reading the user data may be carried out by applying a read voltage to the memory cells storing the user data while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. During the read operation, the auto-referenced read may compare the number of activated memory cells to either the predetermined number or the total number to determine whether all the bits having the first logic state has been detected. When the number of activated memory cells matches either the predetermined number or the total number, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.

公开(公告)号：US20190355413A1

公开(公告)日：2019-11-21

申请号：US16524288

申请日：2019-07-29

Applicant: Micron Technology, Inc.

Inventor： Paolo Amato ,  Marco Sforzin

IPC: G11C11/56 ,  G11C11/16 ,  G11C16/04 ,  G11C16/28 ,  G11C13/00

Abstract: Permutation coding for improved memory cell operations are described. An example apparatus can include an array of memory cells each programmable to a plurality of states. A controller coupled to the array is configured to determine an encoded data pattern stored by a number of groups of memory cells. Each of the number of groups comprises a set of memory cells programmed to one of a plurality of different collective state permutations each corresponding to a permutation in which the cells of the set are each programmed to a different one of the plurality of states to which they are programmable. The controller is configured to determine the encoded data pattern by, for each of the number of groups, determining the one of the plurality of different collective state permutations to which the respective set is programmed by direct comparison of threshold voltages of the cells of the set.

公开(公告)号：US20190325953A1

公开(公告)日：2019-10-24

申请号：US15957098

申请日：2018-04-19

Applicant: Micron Technology, Inc.

Inventor： Paolo Amato ,  Marco Sforzin

IPC: G11C11/56 ,  G11C13/00

Abstract: Permutation coding for improved memory cell operations are described. An example apparatus can include an array of memory cells each programmable to a plurality of states. A controller coupled to the array is configured to determine an encoded data pattern stored by a number of groups of memory cells. Each of the number of groups comprises a set of memory cells programmed to one of a plurality of different collective state permutations each corresponding to a permutation in which the cells of the set are each programmed to a different one of the plurality of states to which they are programmable. The controller is configured to determine the encoded data pattern by, for each of the number of groups, determining the one of the plurality of different collective state permutations to which the respective set is programmed by direct comparison of threshold voltages of the cells of the set.