公开(公告)号：US20050271174A1

公开(公告)日：2005-12-08

申请号：US10974578

申请日：2004-10-27

申请人： Michael DiRenzo ,  David Magee ,  Manish Goel

发明人： Michael DiRenzo ,  David Magee ,  Manish Goel

IPC分类号： H04L1/06 ,  H04L7/00 ,  H04L7/04 ,  H04L7/10 ,  H04L27/26

CPC分类号： H04L7/042 ,  H04L1/06 ,  H04L7/10 ,  H04L27/2662 ,  H04L27/2675

摘要： A system for synchronizing a wireless receiver is provided. The system includes a first antenna (101a) and a second antenna (101b) to receive wireless signals containing data packets. The system includes one or more analyzer components (156) operable to determine correlation metrics based on at least a portion of the first received signal and a portion of the second received signal. The system further includes a synchronization component (158) operable to use the correlation metrics to determine a preferred correlation metric for synchronization by the wireless receiver of the first and second received signals to decode the data packet. A method for synchronizing a receiver of two wireless signals is also provided.

摘要翻译： 提供了一种用于同步无线接收机的系统。 该系统包括用于接收包含数据分组的无线信号的第一天线（101a）和第二天线（101b）。 系统包括一个或多个分析器组件（156），其可操作以基于第一接收信号的至少一部分和第二接收信号的一部分来确定相关度量。 所述系统还包括同步组件（158），其可操作以使用所述相关度量来确定所述无线接收机对所述第一和第二接收信号进行同步的优选相关度量，以对所述数据分组进行解码。 还提供了一种用于同步两个无线信号的接收机的方法。

公开(公告)号：US20050243955A1

公开(公告)日：2005-11-03

申请号：US11105755

申请日：2005-04-14

申请人： Antonio Mondragon-Torres ,  Aris Papasakellariou ,  Steven Pekarich ,  Timothy Schmidl ,  Anand Dabak ,  Eko Onggosanusi ,  Manish Goel

发明人： Antonio Mondragon-Torres ,  Aris Papasakellariou ,  Steven Pekarich ,  Timothy Schmidl ,  Anand Dabak ,  Eko Onggosanusi ,  Manish Goel

IPC分类号： H03K5/159 ,  H04B1/707 ,  H04B7/06 ,  H04L1/02 ,  H04L25/03

CPC分类号： H04L25/03019 ,  H04B1/7105 ,  H04B1/7117 ,  H04B7/0837 ,  H04L2025/03509 ,  H04L2025/03566 ,  H04L2025/03617

摘要： A system comprising a plurality of adaptive equalizers adapted to couple to a plurality of receive antennas, each of the antennas capable of receiving a multipath delay profile estimate (MDPE), control logic interconnecting at least some of the adaptive equalizers, and a control mechanism that, according to different MDPEs, configures at least some of the adaptive equalizers and control logic.

摘要翻译： 一种系统，包括适于耦合到多个接收天线的多个自适应均衡器，所述天线中的每一个能够接收多径延迟分布估计（MDPE），互连所述自适应均衡器中的至少一些的控制逻辑，以及控制机制， 根据不同的MDPE，配置至少一些自适应均衡器和控制逻辑。

公开(公告)号：US10565778B2

公开(公告)日：2020-02-18

申请号：US15682777

申请日：2017-08-22

申请人： Manish Goel ,  Akila Subramaniam ,  Rahul Rithe ,  Seok-Jun Lee

发明人： Manish Goel ,  Akila Subramaniam ,  Rahul Rithe ,  Seok-Jun Lee

IPC分类号： G06K9/00 ,  G06T15/20 ,  H04N5/225 ,  H04N1/21 ,  G06F13/10 ,  G06T1/60 ,  G06T3/00

摘要： A method of implementing memory transfers for image warping in an electronic device is described. The method comprises receiving an input tile associated with an image; generating a geometric boundary around pixels of the input tile; and remapping the pixels in the geometric boundary to an output tile. An electronic device and a non-transitory computer readable storage medium for performing the method are also disclosed.

公开(公告)号：US20170309306A1

公开(公告)日：2017-10-26

申请号：US15135878

申请日：2016-04-22

申请人： Akila Subramaniam ,  Manish Goel ,  Hamid Rahim Sheikh

发明人： Akila Subramaniam ,  Manish Goel ,  Hamid Rahim Sheikh

IPC分类号： G11B20/10 ,  G11B20/12

CPC分类号： H04N21/00 ,  H04N19/00 ,  H04N19/174 ,  H04N19/423

摘要： A method of enabling processing of a video stream is described. The method comprises establishing a slice width for frames of the video stream; receiving the video stream; dividing, for each frame of the video stream, the frame into vertical slices having the slice width; storing a frame of the video stream in a re-ordered slice based format. Computer-readable storage medium and a device for enabling processing of a video stream are also described

公开(公告)号：US08775989B2

公开(公告)日：2014-07-08

申请号：US13178607

申请日：2011-07-08

申请人： Sridhar Gangadharan ,  Manish Goel ,  Amit Handa

发明人： Sridhar Gangadharan ,  Manish Goel ,  Amit Handa

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F2217/84

摘要： In the field of integrated circuit (IC) design it is common to use a plurality of design constraints files to provide the appropriate operational mode when checking the design. Designers typically use the Synopsis® design constraint (SDC) format to describe the constraints in each operational mode. Each time an operational mode is tested a corresponding SDC is used. By merging a plurality of SDCs into a single most pessimistic SDC, designers are able to ensure that the device will properly operate in all the defined operational modes. Only a single run of the merged SDC in the hypothetical mode is required thereby saving time as well as avoiding potential errors from conflicting constraints in different operational modes.

摘要翻译： 在集成电路（IC）设计领域，通常在检查设计时使用多个设计约束文件来提供适当的操作模式。 设计人员通常使用设计约束（SDC）来描述每种操作模式中的约束。 每次测试操作模式时，都使用相应的SDC。 通过将多个SDC合并成一个最悲观的SDC，设计人员能够确保设备将在所有定义的操作模式下正常运行。 只需要在假设模式下运行合并的SDC，从而节省时间，并避免不同操作模式下的冲突限制的潜在错误。

公开(公告)号：US20130191652A1

公开(公告)日：2013-07-25

申请号：US13353462

申请日：2012-01-19

申请人： Mingoo Seok ,  Jing-Fei Ren ,  Manish Goel

发明人： Mingoo Seok ,  Jing-Fei Ren ,  Manish Goel

IPC分类号： G06F1/26

CPC分类号： G06F21/558 ,  G06F1/26 ,  G06F21/755

摘要： An embodiment of the invention provides a cryptographic device that draws a substantially constant current from an accessible electrical node that supplies power to the cryptographic device. Keeping the current drawn from the accessible electrical node substantially constant reduces the probability that secure information may be taken by unwanted third parties from the cryptographic device. The cryptographic device includes an active shunt current regulator, a low-pass filter, a linear voltage regulator and an AES (advanced encryption standard) circuit.

摘要翻译： 本发明的一个实施例提供了一种加密设备，其从可访问的电节点中抽取基本恒定的电流，该电节点向密码设备供电。 保持从可访问的电节点获取的电流基本上是恒定的，降低了不必要的第三方从密码设备获取安全信息的可能性。 密码装置包括主动分流电流调节器，低通滤波器，线性稳压器和AES（高级加密标准）电路。

公开(公告)号：US08425734B2

公开(公告)日：2013-04-23

申请号：US12116339

申请日：2008-05-07

申请人： Manish Goel ,  Chetan Prakash Mittal

发明人： Manish Goel ,  Chetan Prakash Mittal

IPC分类号： B01D3/14

CPC分类号： B01D3/145 ,  B01D3/002 ,  B01D3/14 ,  B01D61/025 ,  B01D61/027 ,  B01D61/145 ,  B01D61/147 ,  B01D61/362 ,  B01D61/58

摘要： A system and process that are a hybrid of distillation and membrane separations offers a highly efficient means of separating a fluid feed mixture into organic, solid, and aqueous components. The distillation section is followed by two membrane separation sections operated in parallel, with the distillation section separating the feed mixture into an organics-rich fraction and an organics-depleted and solids-rich fraction. One membrane section operates on the organics-rich fraction and separates it into a more organics-rich sub-fraction and a water-rich, organics-depleted sub-fraction, while the other membrane section operates on the organics-depleted, solids-rich fraction from the distillation section and separates it into a solids-rich sub-fraction and a solids-depleted, water-rich sub-fraction.

摘要翻译： 作为蒸馏和膜分离的混合物的系统和方法提供了将流体进料混合物分离成有机，固体和水性组分的高效手段。 蒸馏段之后是两个平行操作的膜分离段，蒸馏段将进料混合物分离成富有机物部分和富有机物的富含部分。 一个膜段用于富有机物部分，并将其分离成更富有机物的亚馏分和富含水的富有机物的亚馏分，而另一个膜部分对有机物贫乏的固体富含 馏分从蒸馏部分分离成富含固体的亚馏分和固体贫乏的富水子馏分。

公开(公告)号：US08392804B2

公开(公告)日：2013-03-05

申请号：US12846065

申请日：2010-07-29

申请人： Hun-Seok Kim ,  Seok-Jun Lee ,  Anuj Batra ,  Manish Goel

发明人： Hun-Seok Kim ,  Seok-Jun Lee ,  Anuj Batra ,  Manish Goel

IPC分类号： G06F11/00

CPC分类号： H03M13/13 ,  H03M13/3707 ,  H03M13/3715 ,  H03M13/3776

摘要： A communication system includes a receiver configured to receive a packet that contains plural codewords, and a codeword failure detector cooperatively operable with the receiver. The codeword failure detector can be configured to detect a codeword failure in at least one codeword of the plural codewords as it is being received by the receiver, and to terminate reception at the receiver, when the codeword failure is detected before the end of the packet, to put the receiver into a power save mode for a duration of a remainder of the packet that contains the at least one codeword.

摘要翻译： 通信系统包括：接收器，被配置为接收包含多个码字的分组，以及可与接收机协同工作的码字故障检测器。 码字故障检测器可被配置为在接收机正在接收的多个码字的至少一个码字中检测码字故障，并且当在分组结束之前检测到码字故障时终止在接收机处的接收 在包含至少一个码字的分组的剩余部分的持续时间内将接收机置于省​​电模式。

公开(公告)号：US20110055668A1

公开(公告)日：2011-03-03

申请号：US12846172

申请日：2010-07-29

申请人： Hun-Seok Kim ,  Seok-Jun Lee ,  Manish Goel

发明人： Hun-Seok Kim ,  Seok-Jun Lee ,  Manish Goel

IPC分类号： H03M13/15 ,  G06F11/10

CPC分类号： H03M13/1545 ,  H03M13/152 ,  H03M13/1525 ,  H03M13/658

摘要： A method of determining positions of one or more error bits is disclosed. The method includes receiving a BCH codeword at input circuitry of a decoder device, establishing a threshold number of correctable bits, and determining from the received BCH codeword and a root of an encoder polynomial, a value of each of one or more syndromes. The number of the one or more syndromes is twice a maximum number of correctable bits in the received BCH codeword. When the maximum number of correctable bits in the received BCH codeword is less than the threshold number of correctable bits, the value of each coefficient in a scaled error locator polynomial is determined by performing a non-iterative, closed-form solution on the scaled error locator polynomial. The scaled error locator polynomial is an original error locator polynomial scaled by a constant scale factor. The constant scale factor is determined according to the value of each of the one or more syndromes. Having determined the value of each coefficient in the scaled error locator polynomial, one or more roots of the scaled error locator polynomial are obtained. Each of the one or more roots indicates a position of an error bit. A BCH decoder device that can implement the method and a digital circuit that preserves operations implementing the method are also disclosed.

摘要翻译： 公开了一种确定一个或多个错误位的位置的方法。 该方法包括在解码器装置的输入电路处接收BCH码字，建立阈值数目的可校正比特，以及根据所接收的BCH码字和编码器多项式的根，确定一个或多个综合征中的每一个的值。 一个或多个综合征的数量是接收到的BCH码字中可校正比特的最大数量的两倍。 当接收的BCH码字中的可校正比特的最大数目小于可校正比特的阈值数目时，通过在缩放误差上执行非迭代闭包方法来确定缩放误差定位多项式中的每个系数的值 定位多项式。 缩放误差定位器多项式是通过常数比例因子缩放的原始误差定位器多项式。 恒定比例因子根据一种或多种综合征中的每一种的值确定。 在确定了缩放误差定位多项式中的每个系数的值后，获得了缩放的误差定位多项式的一个或多个根。 一个或多个根中的每一个表示错误位的位置。 还公开了能够实现该方法的BCH解码器装置和保持实现该方法的操作的数字电路。

公开(公告)号：US07827225B2

公开(公告)日：2010-11-02

申请号：US11336459

申请日：2006-01-20

申请人： Jaiganesh Balakrishnan ,  Manish Goel

发明人： Jaiganesh Balakrishnan ,  Manish Goel

IPC分类号： G06F17/14

CPC分类号： H04L27/265 ,  G06F17/142

摘要： In at least some embodiments, a method is provided. The method includes receiving samples from a first input channel and a second input channel. The method further includes controlling commutators to selectively switch samples between the first and second input channels for input to a radix-2 butterfly. The method further includes continuously activating the radix-2 butterfly while processing samples received from the first input channel followed by samples received from the second input channel.

摘要翻译： 在至少一些实施例中，提供了一种方法。 该方法包括从第一输入通道和第二输入通道接收采样。 该方法还包括控制换向器以选择性地在第一和第二输入通道之间切换采样，以输入到基数-2蝴蝶。 该方法还包括在处理从第一输入通道接收的样本后跟从第二输入通道接收的采样时连续激活基数-2蝶形。