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94 条记录 (耗时 0.057 秒)

    Electrostatic actuator with fault tolerant electrode structure
    61.
    发明授权
    Electrostatic actuator with fault tolerant electrode structure 有权
    具有容错电极结构的静电致动器

    公开(公告)号：US07521836B2

    公开(公告)日：2009-04-21

    申请号：US11773331

    申请日：2007-07-03

    申请人： Robert W. Horst

    发明人： Robert W. Horst

    IPC分类号： H02N1/00

    CPC分类号： H02N1/004

    摘要： A high-power electrostatic actuator comprising rotor and stator layers with fault-tolerant electrode structures, a housing to contain the electrodes and dielectric fluid, and electronic circuitry driving a plurality of high-voltage phases. The actuator is constructed from multiple rotor and stator films separated by spacing elements. The electrode structure provides self-alignment for precise assembly. The actuator assembly includes built-in fine-position sensors to allow optimal timing in powering phases, and a coarse position sensor for feedback control. The electrode structure has a large region of linear force to provide low torque-ripple allowing simple high/low voltage pulsing instead of analog high voltage waveforms. Single or double sided flexible circuit manufacturing techniques are used to fabricate the rotor and stator films at low cost.

    摘要翻译： 包括具有容错电极结构的转子和定子层的高功率静电致动器，容纳电极和电介质流体的外壳以及驱动多个高压相的电子电路。 致动器由多个由间隔元件分隔的转子和定子膜构成。 电极结构提供自对准以进行精确的组装。 致动器组件包括内置的精细位置传感器，以允许在供电阶段的最佳定时，以及用于反馈控制的粗略位置传感器。 电极结构具有大的线性力区域，以提供低转矩脉动，允许简单的高/低电压脉冲而不是模拟高电压波形。 单或双面柔性电路制造技术用于以低成本制造转子和定子膜。

    High-torque motor
    63.
    发明授权
    High-torque motor 有权
    高扭矩电机

    公开(公告)号：US07365463B2

    公开(公告)日：2008-04-29

    申请号：US11033368

    申请日：2005-01-10

    申请人： Robert W. Horst ,  Richard R. Marcus

    发明人： Robert W. Horst ,  Richard R. Marcus

    IPC分类号： H02K23/60

    CPC分类号： H02K99/20

    摘要： A motor that delivers high force linear motion or high torque rotary motion to a moving element. The motor may include a driving brake, a driver, a holding brake and a flexible moving element. Operation of the motor may involve activating the holding brake, activating the driver to flex the moving element, activating the holding brake to maintain the position of a portion of the moving element, releasing the driving brake, and restoring the moving element to an unflexed position. The elements are arranged to provide linear motion, belt-driven rotary motion, or directly-coupled rotary motion using brakes and drivers arranged in linear or circular fashion. Drivers may be linear or rotary actuators or motors based on electrostatic, piezoelectric, magnetic, or electrostrictive properties. The brakes may be applied through electrostatic forces, magnetic forces, or mechanical gears engaged with a linear or rotary driving mechanism.

    摘要翻译： 一种向移动元件提供高力直线运动或高扭矩旋转运动的电机。 马达可以包括驱动制动器，驱动器，保持制动器和柔性移动元件。 电动机的操作可以包括启动保持制动器，启动驾驶员以弯曲移动元件，启动保持制动器以保持移动元件的一部分的位置，释放驱动制动器，并将移动元件恢复到未弯曲的位置 。 这些元件被布置成使用以线性或圆形方式布置的制动器和驱动器提供线性运动，皮带驱动的旋转运动或直接耦合的旋转运动。 驱动器可以是基于静电，压电，磁性或电致伸缩特性的线性或旋转致动器或电动机。 制动器可以通过与线性或旋转驱动机构接合的静电力，磁力或机械齿轮施加。

    Microinstruction sequencer having multiple control stores for loading different rank registers in parallel
    66.
    发明授权
    Microinstruction sequencer having multiple control stores for loading different rank registers in parallel 失效
    微指令定序器具有多个用于并行加载不同等级寄存器的控制存储器

    公开(公告)号：US5765007A

    公开(公告)日：1998-06-09

    申请号：US976304

    申请日：1992-11-13

    申请人： Mizanur M. Rahman ,  Robert W. Horst ,  Richard Harris

    发明人： Mizanur M. Rahman ,  Robert W. Horst ,  Richard Harris

    IPC分类号： G06F9/22 ,  G06F9/26 ,  G06F9/28

    CPC分类号： G06F9/26 ,  G06F9/28

    摘要： First and second banks of control stores are used to store microinstructions. Each bank contains three control stores: A horizontal control store, a vertical control store, and a jump control store. The horizontal control store contains the rank four microcode; the vertical control store contains the rank three microcode; and the jump control store contains the same microcode as the vertical control store but is used on conditional jump microoperations. This allows simultaneous accessing of different microinstructions using a single address incrementer. The control store banks are accessed in an overlapping manner so that upon each clock cycle one bank is loading the rank 3 and rank 4 registers. The sequencer according to the present invention includes a return address stack for returning from subroutine calls and trap routines. When processing trap routines, the return address stack stores two microinstruction addresses to allow processing of a previously encountered jump or call operation that may have been aborted when the trap routine was entered.

    摘要翻译： 第一和第二控制柜门用于存储微指令。 每个银行包含三个控制存储：水平控制存储，垂直控制存储和跳转控制存储。 水平控制存储包含四级微码; 垂直控制商店包含三级微码; 并且跳转控制存储器包含与垂直控制存储器相同的微代码，但是用于条件跳转微操作。 这允许使用单个地址增量器同时访问不同的微指令。 以重叠的方式访问控制存储体，使得在每个时钟周期中，一个存储体正在加载等级3和等级4寄存器。 根据本发明的定序器包括用于从子程序调用和陷阱例程返回的返回地址堆栈。 当处理陷阱例程时，返回地址堆栈存储两个微指令地址，以允许处理先前遇到的跳转或调用操作，当进入陷阱程序时可能已经中止了跳转或调用操作。

    System for maintaining polarity synchronization during AMI data transfer
    68.
    发明授权
    System for maintaining polarity synchronization during AMI data transfer 失效
    用于在AMI数据传输期间保持极性同步的系统

    公开(公告)号：US5742135A

    公开(公告)日：1998-04-21

    申请号：US693000

    申请日：1996-06-28

    申请人： Robert W. Horst

    发明人： Robert W. Horst

    IPC分类号： H04L7/00

    CPC分类号： H04L7/0083

    摘要： A communication system transmitting AMI encoded data forces a latent error to occur within a predetermined time duration from an event which generated the latent error. Bit values of original data are selectively inverted to prevent a long sequence of zeros from being transmitted.

    摘要翻译： 发送AMI编码数据的通信系统迫使在产生潜在错误的事件的预定持续时间内发生潜在错误。 选择性地反转原始数据的位值以防止发送长的零序列。

    Computer architecture capable of concurrent issuance and execution of general purpose multiple instructions
    69.
    发明授权
    Computer architecture capable of concurrent issuance and execution of general purpose multiple instructions 失效
    计算机架构能够并发发布和执行通用多指令

    公开(公告)号：US5628024A

    公开(公告)日：1997-05-06

    申请号：US483661

    申请日：1995-06-07

    申请人： Robert W. Horst

    发明人： Robert W. Horst

    IPC分类号： G06F9/26 ,  G06F9/38

    CPC分类号： G06F9/30134 ,  G06F9/261 ,  G06F9/3802 ,  G06F9/3838 ,  G06F9/3844 ,  G06F9/3853 ,  G06F9/3861

    摘要： A system for issuing a family of instructions during a single clock includes a decoder for decoding the family of instructions and logic, responsive to the decode result, for determining whether resource conflicts would occur if the family were issued during one clock. If no resource conflicts occur, an execution unit executes the family regardless of whether dependencies among the instructions in the family exist.

    摘要翻译： 用于在单个时钟期间发出指令系列的系统包括解码器，用于响应于解码结果对指令和逻辑系列进行解码，以确定如果家庭在一个时钟期间被发出，则是否会发生资源冲突。 如果没有发生资源冲突，则执行单元执行该系列，而不考虑该系列中的指令之间的相关性是否存在。

    Computer architecture capable of concurrent issuance and execution of general purpose multiple instruction
    70.
    发明授权
    Computer architecture capable of concurrent issuance and execution of general purpose multiple instruction 失效
    计算机架构能够并发发布和执行通用多指令

    公开(公告)号：US5574941A

    公开(公告)日：1996-11-12

    申请号：US552433

    申请日：1995-11-03

    申请人： Robert W. Horst

    发明人： Robert W. Horst

    IPC分类号： G06F9/26 ,  G06F9/38 ,  G06F9/30

    CPC分类号： G06F9/30134 ,  G06F9/261 ,  G06F9/3802 ,  G06F9/3838 ,  G06F9/3844 ,  G06F9/3853 ,  G06F9/3861

    摘要： A system for issuing a family of instructions during a single clock includes a decoder for decoding the family of instructions and logic, responsive to the decode result, for determining whether resource conflicts would occur if the family were issued during one clock. If no resource conflicts occur, an execution unit executes the family regardless of whether dependencies among the instructions in the family exist.

    摘要翻译： 用于在单个时钟期间发出指令系列的系统包括解码器，用于响应于解码结果对指令和逻辑系列进行解码，以确定如果家庭在一个时钟期间被发出，则是否会发生资源冲突。 如果没有发生资源冲突，则执行单元执行该系列，而不考虑该系列中的指令之间的相关性是否存在。