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公开(公告)号:US11088077B2
公开(公告)日:2021-08-10
申请号:US16866033
申请日:2020-05-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunjae Song , Seunggeol Nam , Yeonchoo Cho , Seongjun Park , Hyeonjin Shin , Jaeho Lee
IPC: H01L23/48 , H01L23/532 , H01L21/768 , H01L23/522
Abstract: Example embodiments relate to a layer structure having a diffusion barrier layer, and a method of manufacturing the same. The layer structure includes first and second material layers and a diffusion barrier layer therebetween. The diffusion barrier layer includes a nanocrystalline graphene (nc-G) layer. In the layer structure, the diffusion barrier layer may further include a non-graphene metal compound layer or a graphene layer together with the nc-G layer. One of the first and second material layers is an insulating layer, a metal layer, or a semiconductor layer, and the remaining layer may be a metal layer.
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公开(公告)号:US10996556B2
公开(公告)日:2021-05-04
申请号:US16004585
申请日:2018-06-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun Lee , Hyeonjin Shin , Seongjun Jeong , Seongjun Park
Abstract: A pellicle configured to protecting a photomask from external contaminants may include a metal catalyst layer and a pellicle membrane including a 2D material on the metal catalyst layer, wherein the metal catalyst layer supports edge regions of the pellicle membrane and does not support a central region of the pellicle membrane. The metal catalyst layer may be on a substrate, such that the substrate and the metal catalyst layer collectively support the edge region of the pellicle membrane and do not support the central region of the pellicle membrane. The pellicle may be formed based on growing the 2D material on the metal catalyst layer and etching an inner region of the metal catalyst layer that supports the central region of the formed pellicle membrane.
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公开(公告)号:US10853921B2
公开(公告)日:2020-12-01
申请号:US16362021
申请日:2019-03-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seongjun Park , Shuangquan Wang , Jungwon Lee
Abstract: A method and an apparatus are provided for sharpening an image, by an image processor of an electronic device. An input image is received. Low pass filtering is applied to the input image to generate a first image and a second image. A kernel size of first image and the second image are different. Edge preserving filtering is applied to the input image to generate a third image and a fourth image. A kernel size of the third image and the fourth image are different. The first image is subtracted from the third image to obtain a first resulting image. The first image has a larger kernel size than the third image. The second image from the fourth image to obtain a second resulting image. The second image has a larger kernel size than the fourth image. The first resultant image, the second resultant image, and the input image are summed to generate a sharpened image.
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公开(公告)号:US20200350256A1
公开(公告)日:2020-11-05
申请号:US16933544
申请日:2020-07-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Changseok Lee , Hyeonjin Shin , Seongjun Park , Donghyun Im , Hyun Park , Keunwook Shin , Jongmyeong Lee , Hanjin Lim
IPC: H01L23/532
Abstract: Example embodiments relate to a wiring structure, a method of forming the same, and an electronic device employing the same. The wiring structure includes a first conductive material layer and a nanocrystalline graphene layer on the first conductive material layer in direct contact with the metal layer.
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公开(公告)号:US20200250797A1
公开(公告)日:2020-08-06
申请号:US16362021
申请日:2019-03-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seongjun Park , Shuangquan Wang , Jungwon Lee
Abstract: A method and an apparatus are provided for sharpening an image, by an image processor of an electronic device. An input image is received. Low pass filtering is applied to the input image to generate a first image and a second image. A kernel size of first image and the second image are different. Edge preserving filtering is applied to the input image to generate a third image and a fourth image. A kernel size of the third image and the fourth image are different. The first image is subtracted from the third image to obtain a first resulting image. The first image has a larger kernel size than the third image. The second image from the fourth image to obtain a second resulting image. The second image has a larger kernel size than the fourth image. The first resultant image, the second resultant image, and the input image are summed to generate a sharpened image
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公开(公告)号:US10529877B2
公开(公告)日:2020-01-07
申请号:US15825388
申请日:2017-11-29
Inventor: Jinseong Heo , Kiyoung Lee , Seongjun Park , Yongseon Shin , Woojong Yu
IPC: H01L29/06 , H01L31/032 , H01L29/66 , H01L29/423 , H01L29/78 , H01L29/786 , H01L29/04 , H01L29/24 , H01L29/41
Abstract: Semiconductor devices including two-dimensional (2D) materials and methods of manufacturing the semiconductor devices are provided. A semiconductor device may include a semiconductor layer including layers of a 2D material, and an intercalation material between the layers of the 2D material. The semiconductor device may further include a first conductive layer on a first surface of the semiconductor layer and a second conductive layer on a second surface of the semiconductor layer that is opposite the first surface. A portion of the 2D material may have a first crystalline structure, and another portion of the 2D material may have a second crystalline structure that is different from the first crystalline structure. The 2D material may include a metal chalcogenide-based material.
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公开(公告)号:US10229881B2
公开(公告)日:2019-03-12
申请号:US14814938
申请日:2015-07-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunjae Song , Seunggeol Nam , Yeonchoo Cho , Seongjun Park , Hyeonjin Shin , Jaeho Lee
IPC: H01L23/48 , H01L23/532 , H01L21/768 , H01L23/522
Abstract: Example embodiments relate to a layer structure having a diffusion barrier layer, and a method of manufacturing the same. The layer structure includes first and second material layers and a diffusion barrier layer therebetween. The diffusion barrier layer includes a nanocrystalline graphene (nc-G) layer. In the layer structure, the diffusion barrier layer may further include a non-graphene metal compound layer or a graphene layer together with the nc-G layer. One of the first and second material layers is an insulating layer, a metal layer, or a semiconductor layer, and the remaining layer may be a metal layer.
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公开(公告)号:US20190033704A1
公开(公告)日:2019-01-31
申请号:US15946087
申请日:2018-04-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seongjun JEONG , Hyeonjin Shin , Sangwon Kim , Seongjun Park , Minsu Seol , Dongwook Lee , Yunseong Lee , Alum Jung
CPC classification number: G03F1/62 , G03F1/22 , G03F7/70008 , G03F7/70983
Abstract: A pellicle composition for a photomask, a pellicle for a photomask, the pellicle for a photomask being formed from the pellicle composition, a method of forming the pellicle, a reticle including the pellicle, and an exposure apparatus for lithography including the reticle are provided. The pellicle composition includes: at least one selected from graphene quantum dots and a graphene quantum dot precursor, the graphene quantum dots having a size of about 50 nm or less; and a solvent.
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公开(公告)号:US10138543B2
公开(公告)日:2018-11-27
申请号:US14810948
申请日:2015-07-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seongjun Jeong , Jaeho Lee , Seongjun Park
Abstract: A method of analyzing growth of a two-dimensional material includes forming a two-dimensional material layer includes defects on a substrate, depositing detection material layers on the defects, and one of (i) capturing an image of the two-dimensional material layer on which the detection material layers are deposited and processing the captured image, or (ii) obtaining map coordinates of the detection material layers and processing the obtained map coordinates.
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公开(公告)号:US10134676B2
公开(公告)日:2018-11-20
申请号:US14932439
申请日:2015-11-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaeho Lee , Taeho Kim , Seongjun Park
IPC: H01L23/532 , H01L23/498
Abstract: A flexible device includes an electronic device having an electrode and a flexible interconnect layer formed on the electrode. The flexible interconnect layer includes a two-dimensional (2D) material and a conductive polymer to have high electric conductivity and flexibility. The flexible device includes a flexible interconnect layer of one or more layers, and in this case, includes a low-dielectric constant dielectric layer between the respective layers.
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