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公开(公告)号:US20230253320A1
公开(公告)日:2023-08-10
申请号:US18297852
申请日:2023-04-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeonjin SHIN , Sangwon Kim , Kyung-Eun Byun , Hyunijae Song , Keunwook Shin , Eunkyu Lee , Changseok Lee , Yeonchoo Cho , Taejin Choi
IPC: H01L23/528 , H10B53/30
CPC classification number: H01L23/5283 , H10B53/30
Abstract: An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of the rest region of the semiconductor layer, a metal layer facing the semiconductor layer, a semi-metal layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the semi-metal layer and the semiconductor and covering the first region.
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公开(公告)号:US11572278B2
公开(公告)日:2023-02-07
申请号:US16675350
申请日:2019-11-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeonjin Shin , Keunwook Shin , Changhyun Kim , Seunggeol Nam , Kyung-Eun Byun , Hyunjae Song , Eunkyu Lee , Changseok Lee , Alum Jung , Yeonchoo Cho
IPC: B32B9/00 , C01B32/186 , B82Y30/00
Abstract: A method of growing graphene includes forming a carbon monolayer on a substrate by injecting a first reaction gas into a reaction chamber, wherein the first reaction gas includes a first source including a component that is a carbon source and belongs to an electron withdrawing group, and injecting a second reaction gas including a second source into the reaction chamber, wherein the second source includes a functional group that forms a volatile structure by reacting with a component that belongs to an electron withdrawing group. Graphene may be directly grown on a surface of the substrate by repeatedly injecting the first reaction gas and the second reaction gas.
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公开(公告)号:US20200350164A1
公开(公告)日:2020-11-05
申请号:US16678115
申请日:2019-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eunkyu Lee , Kyung-Eun Byun , Hyunjae Song , Hyeonjin Shin , Changhyun Kim , Keunwook Shin , Changseok Lee , Alum Jung
IPC: H01L21/02 , H01L29/16 , H01L29/165
Abstract: Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.
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公开(公告)号:US10757554B2
公开(公告)日:2020-08-25
申请号:US16212876
申请日:2018-12-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyunsuk Min , Jieun Kim , Yunjae Lim , Changseok Lee , Sangsun Choi , Jaeeun Kang , Junho Koh , Jongyoub Ryu , Yonghyun Lim
Abstract: The present disclosure relates to a sensor network, Machine Type Communication (MTC), Machine-to-Machine (M2M) communication, and technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the above technologies, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services.A method of managing an electronic device is provided, which includes determining a management target device, selecting at least one measurement device based on the determined management target device, transmitting an operation command to the management target device, receiving measurement information from the at least one measurement device, and determining a state of the management target device based on the received measurement information.
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公开(公告)号:US20200035602A1
公开(公告)日:2020-01-30
申请号:US16238208
申请日:2019-01-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seunggeol Nam , Hyeonjin Shin , Keunwook Shin , Changhyun Kim , Kyung-Eun Byun , Hyunjae Song , Eunkyu Lee , Changseok Lee , Alum Jung , Yeonchoo Cho
IPC: H01L23/532 , H01L23/528 , H01L23/522
Abstract: An interconnect structure and an electronic device including the interconnect structure are disclosed. The interconnect structure may include a metal interconnect having a bottom surface and two opposite side surfaces surrounded by a dielectric layer, a graphene layer on the metal interconnect, and a metal bonding layer providing interface adhesion between the metal interconnect and the graphene layer. The metal bonding layer includes a metal material.
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6.
公开(公告)号:US10539868B2
公开(公告)日:2020-01-21
申请号:US15807106
申请日:2017-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeonjin Shin , Hyunjae Song , Seongjun Park , Keunwook Shin , Changseok Lee
Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.
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公开(公告)号:US09721943B2
公开(公告)日:2017-08-01
申请号:US15052290
申请日:2016-02-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Changseok Lee , Keunwook Shin , Hyeonjin Shin , Seongjun Park , Hyunjae Song , Hyangsook Lee , Yeonchoo Cho
IPC: H01L23/528 , H01L27/06
CPC classification number: H01L27/0629 , H01L23/53271 , H01L27/101 , H01L27/228
Abstract: A wiring structure may include at least two conductive material layers and a two-dimensional layered material layer in an interface between the at least two conductive material layers. The two-dimensional layered material layer may include a grain expander layer which causes grain size of a conductive material layer which is on the two-dimensional layered material layer to be increased. Increased grain size may result in resistance of the second conductive material layer to be reduced. As a result, the total resistance of the wiring structure may be reduced. The two-dimensional layered material layer may contribute to reducing a total thickness of the wiring structure. Thus, a low-resistance and high-performance wiring structure without an increase in a thickness thereof may be implemented.
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公开(公告)号:US12183679B2
公开(公告)日:2024-12-31
申请号:US17902319
申请日:2022-09-02
Applicant: Samsung Electronics Co., Ltd. , UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
Inventor: Hyeonjin Shin , Minhyun Lee , Changseok Lee , Hyeonsuk Shin , Seokmo Hong
IPC: H01L23/532 , H01L23/522
Abstract: An interconnect structure and an electronic apparatus including the interconnect structure are provided. The interconnect structure includes a conductive layer; a dielectric layer configured to surround at least a part of the conductive layer; and a diffusion barrier layer disposed between the conductive layer and the dielectric layer and configured to limit and/or prevent a conductive material of the conductive layer from diffusing into the dielectric layer, and at least one of the dielectric layer and the diffusion barrier layer includes a boron nitride layer of a low dielectric constant.
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9.
公开(公告)号:US12183582B2
公开(公告)日:2024-12-31
申请号:US17548997
申请日:2021-12-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Changseok Lee , Sangwon Kim , Keunwook Shin
IPC: H01L21/285 , H01L29/40
Abstract: A film deposition method may include preparing a non-planar substrate including a first surface, a second surface, and an inclined surface between the first surface and the second surface; depositing a film having a thickness deviation on the first surface, the second surface, and the inclined surface; and etching the film deposited on the first surface, the second surface, and the inclined surface. A height of the second surface may be different than a height of the first surface.
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公开(公告)号:US11975971B2
公开(公告)日:2024-05-07
申请号:US17190852
申请日:2021-03-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangwon Kim , Kyung-Eun Byun , Hyeonjin Shin , Eunkyu Lee , Changseok Lee
IPC: B32B9/00 , C01B32/186 , B82Y30/00
CPC classification number: C01B32/186 , B82Y30/00 , Y10T428/30
Abstract: A graphene manufacturing apparatus includes a reaction chamber a substrate supporter configured to structurally support a substrate inside the reaction chamber; a plasma generator configured to generate a plasma inside the reaction chamber; a first gas supply configured to supply an inert gas into the reaction chamber at a first height from an upper surface of the substrate supporter in a height direction of the reaction chamber; a second gas supply configured to supply a carbon source into the reaction chamber at a second height from the upper surface of the substrate supporter in the height direction of the reaction chamber; and a third gas supply configured to supply a reducing gas into the reaction chamber, wherein the first to third gas supply units are disposed at different heights at a third height from the upper surface of the substrate supporter in the height direction of the reaction chamber.
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