Method for reading data stored in a flash memory according to a voltage characteristic and memory controller thereof

    公开(公告)号:US11031087B2

    公开(公告)日:2021-06-08

    申请号:US16865573

    申请日:2020-05-04

    Inventor: Tsung-Chieh Yang

    Abstract: A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.

    Flash memory controller
    64.
    发明授权

    公开(公告)号:US10824354B2

    公开(公告)日:2020-11-03

    申请号:US16686200

    申请日:2019-11-17

    Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

    METHOD AND APPARATUS FOR PERFORMING DATA-COMPRESSION MANAGEMENT IN A STORAGE SERVER

    公开(公告)号:US20200264778A1

    公开(公告)日:2020-08-20

    申请号:US16278182

    申请日:2019-02-18

    Abstract: A method for performing data-compression management in a storage server may include: receiving data from a host device; performing entropy detection on a plurality of sets of partial data to generate entropy detection values of the plurality of sets of partial data, respectively; classifying the plurality of sets of partial data according to the entropy detection values of the plurality of sets of partial data, respectively, to perform data compression on at least one portion of the plurality of sets of partial data through a plurality of data compression modules, respectively, wherein the plurality of data compression modules correspond to different compression capabilities, respectively; and storing the plurality of sets of partial data into at least one storage device of the storage server and recording address mapping information of the plurality of sets of partial data, respectively. An associated apparatus is also provided.

    Flash memory controller
    68.
    发明授权

    公开(公告)号:US10521142B2

    公开(公告)日:2019-12-31

    申请号:US16260142

    申请日:2019-01-29

    Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

    METHOD FOR CONTROLLING STORAGE DEVICE WITH AID OF ERROR CORRECTION AND ASSOCIATED APPARATUS

    公开(公告)号:US20190341937A1

    公开(公告)日:2019-11-07

    申请号:US16516268

    申请日:2019-07-19

    Inventor: Tsung-Chieh Yang

    Abstract: A method for decoding an error correction code and an associated decoding circuit are provided, where the method includes the steps of: calculating a set of error syndromes of the error correction code, where the error correction code is a t-error correcting code and has capability of correcting t errors, and a number s of the set of error syndromes is smaller than t; sequentially determining a set of coefficients within a plurality of coefficients of an error locator polynomial of the error correction code according to at least one portion of error syndromes within the set of error syndromes for building a roughly-estimated error locator polynomial; performing a Chien search to determine a plurality of roots of the roughly-estimated error locator polynomial; and performing at least one check operation to selectively utilize a correction result of the error correction code as a decoding result of the error correction code.

    METHOD FOR ACCESSING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE

    公开(公告)号:US20190294499A1

    公开(公告)日:2019-09-26

    申请号:US16056555

    申请日:2018-08-07

    Inventor: Tsung-Chieh Yang

    Abstract: The present invention provides a method for accessing a flash memory module, wherein the method comprises: receiving data and a corresponding metadata from a host device; performing a CRC operation upon the data to generate a CRC code; encoding the metadata and the CRC code to generate an adjusted parity code; encoding the data and the adjusted parity code to generate encoded data, wherein the encoded data comprises the data, the adjusted parity code and an error correction code corresponding to the data and the adjusted parity code; and writing the encoded data and the metadata to a page of a block of a flash memory module.

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