PACKAGE ON PACKAGE USING A BUMP-LESS BUILD UP LAYER (BBUL) PACKAGE
    61.
    发明申请
    PACKAGE ON PACKAGE USING A BUMP-LESS BUILD UP LAYER (BBUL) PACKAGE 有权
    包装使用无BUG-BUILD UP LAYER(BBUL)包装的包装

    公开(公告)号:US20090294942A1

    公开(公告)日:2009-12-03

    申请号:US12132085

    申请日:2008-06-03

    IPC分类号: H01L23/28

    摘要: In some embodiments, package on package using a bump-less build up layer (BBUL) package is presented. In this regard, an apparatus is introduced comprising a microelectronic die having an active surface, an inactive surface parallel to said active surface, and at least one side, an encapsulation material adjacent said at least one microelectronic die side, wherein said encapsulation material includes a bottom surface substantially planar to said microelectronic die active surface and a top surface substantially planar to said microelectronic die inactive surface, a through via connection in said encapsulation material extending from said top surface to said bottom surface, a first dielectric material layer disposed on at least a portion of said microelectronic die active surface and said encapsulation material surface, a plurality of build-up layers disposed on said first dielectric material layer, and a plurality of conductive traces disposed on said first dielectric material layer and said build-up layers and in electrical contact with said microelectronic die active surface. Other embodiments are also disclosed and claimed.

    摘要翻译: 在一些实施例中,提供了使用无凸起建立层(BBUL)封装的封装封装。 在这方面,引入一种装置,其包括具有活性表面的微电子管芯,与所述有源表面平行的非活性表面,以及至少一个侧面,与所述至少一个微电子管芯侧相邻的封装材料,其中所述封装材料包括 底表面与所述微电子管芯有效表面基本上平面,并且与所述微电子管芯非活性表面基本平面的顶表面,从所述顶表面延伸到所述底表面的所述封装材料中的通孔连接,至少设置在第一介电材料层 所述微电子管芯有源表面和所述封装材料表面的一部分,设置在所述第一介电材料层上的多个堆积层以及设置在所述第一介电材料层和所述堆积层上的多个导电迹线 与所述微电子管芯有源表面电接触。 还公开并要求保护其他实施例。