摘要:
An integrated circuit device for use in a node of a communication system is provided. The integrated circuit device includes a memory configured to store data written thereto by a receiver associated with the node in accordance with a receiver clock, and to read data therefrom by a transmitter associated with the node in accordance with a transmitter clock. The integrated circuit device also includes a control logic circuit that is in communication with the memory, and is configured to send a control signal to the transmitter to adjust a speed of the transmitter clock responsive to an operating condition of the memory.
摘要:
A conventional serial communications protocol that is limited to supporting only host-to-slave communications, such as SATA or SAS, is extended to support peer-to-peer communications, e.g., by adding a memory-map layer into the conventional protocol stack between the link layer and the protocol layer. The addition of the memory-map layer enables two (or more) non-host devices (i.e., peer devices) to communicate with one another without using a host computer and without relying on conventional protocol-bridging techniques.
摘要:
Methods and apparatus are provided for generating one or more clock signals for a decision-feedback equalizer using DFE detected data. A received signal is sampled using a data clock and a transition clock to generate a data sample signal and a transition sample signal, respectively. A DFE correction is obtained for each of the data sample and transition sample signals to generate DFE detected data and a DFE transition data. The DFE detected data and DFE transition data are then applied to a phase detector that generates a signal to adjust a phase of one or more of the data clock and transition clock. In a multi-level implementation, the received signal is sampled using a clock associated with each of the levels and the samples are latched using a vertical slicing technique to generate DFE data associated with each of said levels.
摘要:
Methods and apparatus are provided for monitoring and compensating for skew on a high speed parallel bus. Delay skew for a plurality of signals on a parallel bus is monitored by obtaining a plurality of samples of the plurality of signals for each unit interval; and identifying a location of transitions in the plurality of signals based on the samples. The samples can be obtained, for example, by sampling the plurality of signals using a plurality of latches and estimating a value of one or more of the plurality of signals by comparing values of the latches. A microprocessor can optionally be employed to determine a relative distribution of transitions in the plurality of signals and to align transitions in the plurality of signals to a common position. The transitions in the plurality of signals can be aligned to a common position by adjusting a delay control setting for a buffer associated with each of the plurality of signals.
摘要:
Methods and apparatus are provided for detecting a loss of lock condition in a clock and data recovery system. A loss of lock condition is detected in a clock and data recovery system that generates a recovered clock signal from a received signal by sampling the received signal for a plurality of different phases using one or more latches clocked by the recovered clock; evaluating the samples to monitor a data eye associated with the received signal; and detecting the loss of lock condition if the data eye does not satisfy one or more predefined conditions. Generally, the predefined conditions identify a loss of the data eye (e.g, when the data eye cannot be substantially detected), for example, based on a degree of opening of the data eye. The clock and data recovery system can optionally be restarted if the loss of lock condition is detected.
摘要:
An amplifier having DC offset compensation includes at least one input node and a pair of differential output nodes, a biasing circuit coupled to the input node; and a plurality of current sources. Selected ones of said current sources are coupled to the input node to adjust a DC voltage at the input node to provide DC offset compensation for the amplifier
摘要:
Methods and apparatus are provided for equalizing a received signal. A received signal is equalized by updating one or more equalization parameters; and discarding the updated equalization parameters if one or more predefined qualifier conditions are detected during the equalizing step. The received signal can optionally be equalized using the updated equalization parameters if the predefined qualifier conditions are not detected during the equalizing step. The updated equalization parameters can optionally be stored if the one or more predefined qualifier conditions are not detected during the equalizing step
摘要:
Methods and apparatus are provided for determining receiver filter coefficients for a plurality of phases. One or more coefficients for a receiver filter are determined by determining a first coefficient for a first phase of a data eye; and determining a second coefficient for a second phase of the data eye. The receiver filter may be, for example, a decision-feedback equalizer. The first and second coefficients may be determined by performing an LMS adaptation of decision-feedback equalization coefficients. In another embodiment, the first and second coefficients may be determined by obtaining eye opening metrics from a data eye monitor corresponding to each of the respective first phase and the second phase; and determining the respective first and second coefficients based on the eye opening metrics. The first and second phases can correspond to odd and even phases.
摘要:
A system for improving the attenuation of an undesired signal found in a differential signal path through the use of inductive coupling. The system includes a primary inductor, a secondary inductor, and a filter. The primary inductor and the secondary inductor operably couple an input differential signal pair to an output differential signal pair, and the filter attenuates an undesired signal in the output differential signal pair.
摘要:
A pre-distorter that compensates for amplitude and phase distortion created by an amplifier. During a training session, the amplifier is stimulated with input signals of pre-selected amplitude and phase at various temperatures and the amplifier output is captured and converted into data sets. Polynomials are then fitted to the data sets and inverses of the polynomials are determined. The coefficients of the inverse polynomials are then saved for each temperature. During operation, the amplifier temperature is predicted based on the amplifier input signal and the coefficients associated with the predicted temperature are selected to be applied to the input signal to compensate for amplitude and phase distortion caused by the amplifier.