公开(公告)号：US07057230B2

公开(公告)日：2006-06-06

申请号：US10484578

申请日：2002-07-22

申请人： Toshihiro Tanaka ,  Yukiko Umemoto ,  Mitsuru Hiraki ,  Yutaka Shinagawa ,  Masamichi Fujito ,  Kazufumi Suzukawa ,  Hiroyuki Tanikawa ,  Takashi Yamaki ,  Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Nozomu Matsuzaki

发明人： Toshihiro Tanaka ,  Yukiko Umemoto ,  Mitsuru Hiraki ,  Yutaka Shinagawa ,  Masamichi Fujito ,  Kazufumi Suzukawa ,  Hiroyuki Tanikawa ,  Takashi Yamaki ,  Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Nozomu Matsuzaki

IPC分类号： H01L29/788

CPC分类号： G11C16/26 ,  G11C5/025 ,  G11C8/08 ,  G11C16/04 ,  G11C16/0425 ,  G11C16/0433 ,  G11C16/08 ,  G11C16/24 ,  G11C16/30 ,  H01L21/28 ,  H01L21/28273 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11546 ,  H01L29/42328 ,  H01L29/42332 ,  H01L29/4234 ,  H01L29/66825 ,  H01L29/7885 ,  H01L29/792

摘要： A semiconductor device includes a plurality of nonvolatile memory cells (1). Each of the nonvolatile memory cells comprises a MOS type first transistor section (3) used for information storage, and a MOS type second transistor section (4) which selects the first transistor section. The second transistor section has a bit line electrode (16) connected to a bit line, and a control gate electrode (18) connected to a control gate control line. The first transistor section has a source line electrode (10) connected to a source line, a memory gate electrode (14) connected to a memory gate control line, and a charge storage region (11) disposed directly below the memory gate electrode. A gate withstand voltage of the second transistor section is lower than that of the first transistor section. Assuming that the thickness of a gate insulating film of the second transistor section is defined as tc and the thickness of a gate insulating film of the first transistor section is defined as tm, they have a relationship of tc

摘要翻译： 半导体器件包括多个非易失性存储单元（1）。 每个非易失性存储单元包括用于信息存储的MOS型第一晶体管部分（3）和选择第一晶体管部分的MOS型第二晶体管部分（4）。 第二晶体管部分具有连接到位线的位线电极（16）和连接到控制栅极控制线的控制栅电极（18）。 第一晶体管部分具有连接到源极线的源极线电极（10），连接到存储器栅极控制线的存储栅电极（14）和直接位于存储栅电极下方的电荷存储区域（11）。 第二晶体管部分的栅极耐受电压低于第一晶体管部分的栅极耐受电压。 假设第二晶体管部分的栅极绝缘膜的厚度被定义为tc，并且第一晶体管部分的栅极绝缘膜的厚度被定义为tm，它们具有tc

公开(公告)号：US07012296B2

公开(公告)日：2006-03-14

申请号：US11126236

申请日：2005-05-11

申请人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

发明人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

IPC分类号： H01L29/788

CPC分类号： G11C16/0425

摘要： A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

公开(公告)号：US20050219900A1

公开(公告)日：2005-10-06

申请号：US11126236

申请日：2005-05-11

申请人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

发明人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

IPC分类号： G11C16/04

CPC分类号： G11C16/0425

摘要： A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

摘要翻译： 高密度，高速度和高可靠性的多存储非易失性存储器具有置于存储晶体管的两侧的存储晶体管和开关晶体管。 存储晶体管包括具有离散陷阱和存储栅电极的栅极绝缘膜，而开关晶体管包括开关栅电极。 栅极绝缘膜具有用于存储信息电荷的离散陷阱，可以局部注入载流子，并且一个存储器单元构成用于至少存储2位信息的多存储单元。 具有开关栅电极的开关晶体管实现源极侧注入。 存储晶体管与自对准扩散中的开关晶体管一起发生。 存储晶体管的存储栅电极连接到字线，以便执行字线擦除。

公开(公告)号：US06674122B2

公开(公告)日：2004-01-06

申请号：US10377785

申请日：2003-03-04

申请人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

发明人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

IPC分类号： H01L29792

CPC分类号： H01L27/11568 ,  G11C11/5671 ,  G11C16/0475 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7887 ,  H01L29/7923

摘要： A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

摘要翻译： 高密度，高速度和高可靠性的多存储非易失性存储器具有置于存储晶体管的两侧的存储晶体管和开关晶体管。 存储晶体管包括具有离散陷阱和存储栅电极的栅极绝缘膜，而开关晶体管包括开关栅电极。 栅极绝缘膜具有用于存储信息电荷的离散陷阱，可以局部注入载流子，并且一个存储器单元构成用于至少存储2位信息的多存储单元。 具有开关栅电极的开关晶体管实现源极侧注入。 存储晶体管与自对准扩散中的开关晶体管一起发生。 存储晶体管的存储栅电极连接到字线，以便执行字线擦除。