Abstract:
A package structure that uses a bump posited type lead frame is disclosed. The package structure uses a lead frame having holes thereon for accommodating conductive bumps of a chip or a positioning film having openings thereon for accommodating conductive bumps of a chip or both to avoid the flow and deformation of the conductive bumps during bonding so as to prevent the electrical property of the package structure from degradation and increase the reliability of the chip package.
Abstract:
A real current sense apparatus for a DC-to-DC converter uses a current mirror composed by two JFETs to mirror the output current of the converter to generate a temperature-independent mirror current to further generate a current sense signal. Due to the temperature-independence of the mirror current, the current sense signal is also temperature-independent.
Abstract:
A voltage generating circuit, which generates tri-state logic output in accordance with high, low or floating of the input node, is proposed. The present voltage generating circuit includes: a pulse generating circuit for generating a plurality of pulses; a voltage selecting circuit having a pair of NMOS transistors coupled in common source, each drain of the NMOS transistors is coupled to a current source respectively, both gates of the NMOS transistors are coupled to an input node, and the paired drain of the NMOS transistors generate a pair of voltage output; a plurality of flip-flops, which couple to drains of the NMOS transistors to lock the voltage output of the NMOS transistors in accordance with the pulses; an inner voltage-generating unit couples to the input node for providing a floating voltage level; and a plurality of switches controlled by the pulses for controlling the normal operation of the voltage selecting circuit and the conduction between the inner-voltage generating unit with the input node.
Abstract:
A pulse width modulation (PWM) Regulator System with automatically switching pulse skipping mode (PSM) is disclosed. The PWM regulator system comprises a PWM regulator, a PSM switching module and a pulse generator. The PWM regulator converts the input voltage by PWM. The PSM switching module determines to enter or exit the PSM. The pulse generator adaptively produces pulse signal for the switching regulator to operate in PSM.
Abstract:
A driver circuit for a DC light source supplies a voltage generated by a DC-to-DC converter for a plurality of lamp strings connected in parallel and a plurality of driving currents generated by a current mirror for the lamp strings, such that the lamp strings may have well controlled or uniform brightness.
Abstract:
A method, which is for determining switching state of a transistor-based switching device that includes a set of transistors, includes the steps of: applying a bias voltage to a transistor having a fastest response so as to dispose the transistors in the set in a desired transistor state; detecting a voltage level at a transistor having a slowest response to the bias voltage; and comparing the detected voltage level with a predetermined threshold voltage level in order to determine the switching state of the switching device. A transistor-based switching device is also disclosed.
Abstract:
A switching mode voltage regulator comprises a pulse width modulator and an adjustable one-shot circuit to generate an adjustable signal based on an input voltage, an adjustable voltage, and a PWM signal from the pulse width modulator at light loading to switch a high-side switch of an output stage in the voltage regulator. The ON duty of the adjustable signal is controlled by the adjustable voltage, such that it will be larger than that of the PWM signal and as a result, the number of switching the switch of the output stage is decreased, thereby reducing the switching loss and improving the efficiency of the voltage regulator.
Abstract:
A package structure that uses a bump posited type lead frame is disclosed. The package structure uses a lead frame having holes thereon for accommodating conductive bumps of a chip or a positioning film having openings thereon for accommodating conductive bumps of a chip or both to avoid the flow and deformation of the conductive bumps during bonding so as to prevent the electrical property of the package structure from degradation and increase the reliability of the chip package.
Abstract:
To generate a signal when a target temperature is reached, a temperature detector circuit is provided with a first and second current sources connected in series, of which the first current source generates a PTAT current and the second current source is supplied with a temperature-independent reference voltage to generate a second current proportional to the reference voltage. The first and second currents are a first and second reference currents, respectively, at a reference temperature, and the first and second current sources are configured such that the ratio of the second reference current to the first reference current is proportional to the ratio of the target temperature to the reference temperature.
Abstract:
A programmable voltage supervisory circuit and method with minimum programming pins and low quiescent current is provided to monitor a supply voltage, by which only one programming pin can configure three voltage levels for the threshold voltage to be compared to the supply voltage. The programming pin is connected with a voltage select signal that is defined to be high, low or floating states each determines a setting voltage among three levels corresponding to the three threshold voltages, respectively, by a voltage select circuit. A sample/hold circuit in combination with a switch arrangement is further connected to the voltage select circuit such that the programmable voltage supervisory circuit is only operationable during the duty of a clock and thereby to reduce the power consumption thereof by squeezing the duty.