摘要:
An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.
摘要:
A method is provided for estimating channel state information in an in-band on-channel radio signal including a plurality of digitally modulated reference subcarriers. The method includes: receiving symbols transmitted on the reference subcarriers; combining the reference subcarrier symbols with a known reference sequence conjugate to produce a plurality of samples; median filtering the samples to produce filtered samples; smoothing the samples for each of the reference subcarriers over the plurality of reference subcarriers to produce a complex channel gain estimate for each of the subcarriers; and using a bias correction function to compensate for estimation bias error in the complex channel gain estimate due to the median filtering. Receivers that implement the method are also provided.
摘要:
A polar receiver using injection-locking technique includes an antenna, a first filter, a first voltage-controlled oscillator, a first mixer, a frequency discriminator, a second filter, a third filter, a first analog-digital converter, a second analog-digital converter and a digital signal processing unit. Mentioned polar receiver enables to separate an envelope signal and a frequency-modulated signal from a radio frequency signal received from the antenna via the injection locking technique of the first voltage-controlled oscillator and the frequency discriminator. The envelope component and the frequency-modulated component can be digitally processed by the digital signal processing unit to accomplish polar demodulation.
摘要:
A polar receiver using injection-locking technique includes an antenna, a first filter, a first voltage-controlled oscillator, a first mixer, a frequency discriminator, a second filter, a third filter, a first analog-digital converter, a second analog-digital converter and a digital signal processing unit. Mentioned polar receiver enables to separate an envelope signal and a frequency-modulated signal from a radio frequency signal received from the antenna via the injection locking technique of the first voltage-controlled oscillator and the frequency discriminator. The envelope component and the frequency-modulated component can be digitally processed by the digital signal processing unit to accomplish polar demodulation.
摘要:
A receiver uses a wideband intermediate frequency (IF) in the analog domain and performs low IF down-conversion in the digital domain, using low-power, high-speed, high resolution analog-to-digital converters. The receiver can be integrated into an integrated circuit as one of several receivers. Such an integrated circuit may include multiple transmitters using adaptive non-linear modeling pre-distortion. The non-linear modeling may include memory. Imbalance in intermediate frequency in-phase and quadrature signals may be corrected in the digital domains. DC offsets in the intermediate signal may be corrected in both analog and digital domains. In one instance, the receiver provides a feedback receiver for the adaptive pre-distorter in a transmitter on the integrated circuit.
摘要:
An Automatic Gain Control (AGC) circuit as used in a digital receiver that utilizes a main loop filter that is of a relatively wide bandwidth. A pre-filter, wideband variance is determined from the input digital signal, and a post-filter, narrowband variance is also determined. The wideband and narrowband variances are then compared to determine if the wideband signal power indicates a variance level that is too great to permit normal loop operation. By reapplying this difference in the power levels to the filter output as needed, such as by a scaling operation, the loss in dynamic range is effectively recovered. In a preferred embodiment, an adjustable gain input amplifier feeds an intermediate frequency (IF) signal to an analog-to-digital converter (ADC). The digitized IF signal is then down-converted to a baseband frequency and subjected to digital filtering. A narrowband sample variance (PN) of the digitally filtered (narrowband) data is then determined. A wideband sample variance (PW) is also taken from the raw ADC output data over the same period as the time period used for PN. In the presence of out-of-band signal components, PW will be quite different from PN. This difference indicates a desired proportional difference in a control voltage or a gain backoff amount.
摘要:
An Automatic Gain Control (AGC) circuit as used in a digital receiver that utilizes a main loop filter that is of a relatively wide bandwidth. A pre-filter, wideband variance is determined from the input digital signal, and a post-filter, narrowband variance is also determined. The wideband and narrowband variances are then compared to determine if the wideband signal power indicates a variance level that is too great to permit normal loop operation. By reapplying this difference in the power levels to the filter output as needed, such as by a scaling operation, the loss in dynamic range is effectively recovered. In a preferred embodiment, an adjustable gain input amplifier feeds an intermediate frequency (IF) signal to an analog-to-digital converter (ADC). The digitized IF signal is then down-converted to a baseband frequency and subjected to digital filtering. A narrowband sample variance (PN) of the digitally filtered (narrowband) data is then determined. A wideband sample variance (PW) is also taken from the raw ADC output data over the same period as the time period used for PN. In the presence of out-of-band signal components, PW will be quite different from PN. This difference indicates a desired proportional difference in a control voltage or a gain backoff amount.
摘要:
There are provided an IF signal generating portion 10 for generating an intermediate frequency signal, and an amplitude error correcting portion 15 for setting a gain of an amplitude correcting portion 12 to eliminate an amplitude error between a signal processed by a first signal processing system for an I signal and a signal processed by a second signal processing system for a Q signal when the intermediate frequency signal generated by the IF signal generating portion 10 is selected by switches 7I and 7Q. By correcting an amplitude error using the intermediate frequency signal generated by the IF signal generating portion 10 in place of an intermediate frequency signal generated by processing an actual received signal, it is possible to accurately detect the amplitude error without an influence of a phase error by using a signal which does not include a phase error caused by a variation in elements of mixers 4I and 4Q and a 90° phase shifter 6 themselves.
摘要:
Conventional digital calibration type analog-to-digital converters cannot converge calibration within an preamble period of a packet signal. An analog-to-digital converter is subjected to digital calibration using a beacon signal, a polling signal, or another user signal or a signal applied from a transceiver side to a receiver side. Some or all of circuits are brought into a sleep mode in a period except data reception and the analog-to-digital converter calibration such that a signal monitor unit detects another signal to activate the circuit in the sleep mode for performing the calibration of the analog-to-digital converter for reducing the power consumption.
摘要:
A receiver to recover a signal of interest while consuming reduced power in some scenarios. The receiver contains a in-phase channel processing path and a quadrature phase channeling path for down converting an input signal to an intermediate frequency, and then recovering the signal of interest by further processing of the input signal at intermediate frequency. One of the two paths is turned off upon occurrence of a desired condition, which reduces power consumption. In an embodiment, the condition is that the input signal does not contain an image signal of the signal of interest.