Electronic chip memory
    701.
    发明授权

    公开(公告)号:US11164647B2

    公开(公告)日:2021-11-02

    申请号:US16713947

    申请日:2019-12-13

    Abstract: A device includes a number of irreversibly programmable memory points. Each irreversibly programmable memory point includes a first semiconductor zone and a gate located on the first zone. A conductive area defines the gates of the memory points. First and second semiconductor areas are respectively located on either side of a vertical alignment with the conductive area. The first zones are alternately in contact with the first and second areas.

    Method and device for estimating noise level of dark reference rows of an image sensor

    公开(公告)号:US11128824B2

    公开(公告)日:2021-09-21

    申请号:US16711198

    申请日:2019-12-11

    Abstract: A system has an array of pixels including a plurality of active pixels and a plurality of dark reference pixels and processing circuitry coupled to the array of pixels. The processing circuitry sequentially computes, for each of a plurality of pairs of sets of dark reference pixels of the plurality of dark reference pixels, absolute differences in dark signal levels of the pair of sets of dark reference pixels. The absolute differences in dark signal levels are accumulated and a noise level of the dark reference pixels of the array of pixels is estimated based on the accumulated absolute differences. The system may be employed in, for example, a back-up camera of an automobile or a mobile phone.

    DIGITAL CIRCUIT MONITORING DEVICE
    703.
    发明申请

    公开(公告)号:US20210278461A1

    公开(公告)日:2021-09-09

    申请号:US17189984

    申请日:2021-03-02

    Abstract: A ring oscillator includes a chain of logic components. A storage element is associated with each logic component and configured to store a state of an output of the logic component to which the storage element is associated. A first circuit counts state transitions of an output of a given logic component of the chain. A second circuit synchronizes each storage with a clock signal. A third circuit determines a number of logic components crossed by a state transition between two edges of the clock signal. This determination is made based on the counted number of state transitions and on the stored states of the outputs.

    THERMAL SENSOR CIRCUIT
    704.
    发明申请

    公开(公告)号:US20210278286A1

    公开(公告)日:2021-09-09

    申请号:US17192411

    申请日:2021-03-04

    Abstract: An electronic device includes a module that delivers a positive temperature coefficient output voltage at an output terminal. A thermistor includes a first MOS transistor operating in weak inversion mode and having a negative temperature coefficient drain-source resistance and whose source is coupled to the output terminal. A current source coupled to the output terminal operates to impose the drain-source current of the first transistor.

    Integrated optical switch
    709.
    发明授权

    公开(公告)号:US10972097B2

    公开(公告)日:2021-04-06

    申请号:US16643383

    申请日:2017-08-29

    Abstract: In accordance with an embodiment of the present invention, an optical switch includes a photoconductor body including a first edge and an opposite second edge, a first end and an opposite second end. The first edge is configured to receive an electrical input signal and the second edge is configured to deliver an electrical output signal. The photoconductor body is configured to have an electrically ON state that is activated by an optical signal and an electrically OFF state that is activated by an absence of the optical signal. A direction from the first end to the second end defines a longitudinal direction. The direction from the first edge to the second edge defines a first direction that is orthogonal to the longitudinal direction. A first dimension between the first edge and the second edge along the first direction decreases from the first end to the second end.

    INTEGRATED CIRCUIT WITH DOUBLE ISOLATION OF DEEP AND SHALLOW TRENCH-ISOLATION TYPE

    公开(公告)号:US20210020660A1

    公开(公告)日:2021-01-21

    申请号:US16927510

    申请日:2020-07-13

    Abstract: A silicon-on-insulator semiconductor substrate supports rows extending in a direction. Each row includes complementary MOS transistors and associated contact regions allowing back gate of the complementary MOS transistors to be biased. All transistors and associated contact regions of a given row are mutually isolated by a first trench isolation. Each row is bordered on opposed edges extending parallel to said direction by corresponding second trench isolations that are shallower than the first trench isolation.

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