公开(公告)号：US10469124B2

公开(公告)日：2019-11-05

申请号：US15968927

申请日：2018-05-02

Applicant: STMicroelectronics SA

Inventor： Laurent Chabert ,  Raphael Paulin

IPC: H04B1/48 ,  H04B1/16 ,  H04B1/18 ,  H03F3/195 ,  H03F1/26 ,  H03F1/52 ,  H03F3/72

Abstract: A communications device includes a transmission chain coupled to an antenna a receiver chain coupled to the antenna. The receiver chain includes an amplifier device having an input coupled to the antenna. A controlled switching circuit is included in the amplifier device and is operable to selectively disconnect conduction terminals of an amplifying transistor from power supply terminals when the transmission chain is operating to pass a transmit signal to the antenna.

公开(公告)号：US10455123B2

公开(公告)日：2019-10-22

申请号：US15591597

申请日：2017-05-10

Applicant: STMicroelectronics SA

Inventor： Estelle Lesellier

IPC: H04N1/60 ,  G06T5/00 ,  G06T5/40 ,  H04N1/62

Abstract: An image formed from pixels each having components defining a color is processed to implement an increase in the saturation of the image depending on a gain applied by a transfer function depending on the components of the color of each pixel. The gain of the transfer function is parameterized using at least one control parameter respectively dedicated to at least one type of reference image content. The value of the at least one control parameter is calculated depending on the actual content of the image by implementing calculations including determining colorimetric statistics of the pixels of the image and processing the statistics in accordance with at least one processing model respectively associated with the at least one type of reference image content.

公开(公告)号：US10395383B2

公开(公告)日：2019-08-27

申请号：US15381928

申请日：2016-12-16

Applicant: STMicroelectronics SA

Inventor： Manu Alibay ,  Stéphane Auberger ,  Bogdan-Florin Stanciulescu

IPC: G06K9/00 ,  G06T7/70

Abstract: A method estimates an ego-motion of an apparatus between a first image and a second image of a succession of images captured by the apparatus, in a SLAM type algorithm containing a localization part including the ego-motion estimating and a mapping part. The ego-motion comprises a 3D rotation of the apparatus and a position variation of the apparatus in the 3D space, and the ego-motion estimating comprises performing a first part and performing a second part after having performed the first part, the first part including estimating the 3D rotation of the apparatus and the second part including, the 3D rotation having been estimated, estimating the position variation of the apparatus in the 3D space.

公开(公告)号：US10379619B2

公开(公告)日：2019-08-13

申请号：US14553216

申请日：2014-11-25

Applicant: STMicroelectronics SA ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Marc Drader ,  Jérémie Teyssier ,  Olivier Pothier

IPC: G06F3/042 ,  G06F3/01 ,  G01C9/06 ,  G01B11/14 ,  G06F3/03 ,  G01S17/08 ,  G01S17/87

Abstract: A method for controlling an apparatus, includes steps of: determining distance measurements of an object in a first direction, using distance sensors defining between them a second direction different from the first direction, assessing a first inclination of the object in relation to a second direction based on the distance measurements, and determining a first command of the apparatus according to the inclination assessment.

公开(公告)号：US20190245258A1

公开(公告)日：2019-08-08

申请号：US16317082

申请日：2016-07-12

Applicant: STMicroelectronics SA

Inventor： Vincent KNOPIK ,  Boris MORET ,  Eric KERHERVE

IPC: H01P5/18

CPC classification number: H01P5/187 ,  H01P5/186

Abstract: A 90° hybrid inductive-capacitive coupling stage includes two first stage terminals capable of forming two stage inputs or two stage outputs and two second stage terminals capable of respectively forming two stage outputs or two stage inputs. The coupling stage is advantageously modular having a first stage axis of symmetry and a second stage axis of symmetry orthogonal to each other with neighboring inductive metal tracks being overlaid in at least one crossing region to form both an inductive circuit and a capacitive circuit. The metal tracks are coupled to the first stage terminals and to the second stage terminals such that the two first stage terminals are situated on one side of the first stage axis of symmetry and the two second stage terminals are situated on the other side of the first stage axis of symmetry.

公开(公告)号：US10355649B2

公开(公告)日：2019-07-16

申请号：US15683236

申请日：2017-08-22

Applicant: STMicroelectronics SA

Inventor： Jean-Pierre Blanc ,  Severin Trochut

IPC: H03F3/04 ,  H03F1/30 ,  H03F1/02 ,  G05F3/30

Abstract: A voltage or current generator has a configurable temperature coefficient and includes a first voltage generator that generates a first voltage having a first negative temperature coefficient. A second voltage generator generates a second voltage having a second negative temperature coefficient different to the first negative temperature coefficient. A circuit generates an output level based on the difference between the first voltage scaled by a first scale factor and the second voltage scaled by a second scale factor.

公开(公告)号：US10340265B2

公开(公告)日：2019-07-02

申请号：US15694403

申请日：2017-09-01

Applicant: STMicroelectronics SA

Inventor： Johan Bourgeat

IPC: H02H9/04 ,  H01L27/02 ,  H01L27/06 ,  H01L49/02

Abstract: An integrated circuit includes a power supply terminal, a reference terminal, and a signal terminal. A first protection device is coupled between the signal terminal and the power supply terminal, the first protection device including a first MOS transistor. A second protection device is coupled between the signal terminal and the reference terminal, the second protection device including a second MOS transistor. Gates of the MOS transistors are directly or indirectly coupled to the reference terminal. Substrates of the MOS transistors are coupled to the reference terminal via a common resistor.

公开(公告)号：US10334168B2

公开(公告)日：2019-06-25

申请号：US16236043

申请日：2018-12-28

Applicant: STMicroelectronics SA

Inventor： Manu Alibay ,  Stéphane Auberger

IPC: H04N5/232 ,  G06T7/35 ,  H04N5/14 ,  G06T7/33

Abstract: A method determines a movement of an apparatus between capturing first and second images. The method includes testing model hypotheses of the movement by for example a RANSAC algorithm, operating on a set of first points in the first image and assumed corresponding second points in the second image to deliver the best model hypothesis. The testing includes, for each first point, calculating a corresponding estimated point using the tested model hypothesis, determining the back-projection error between the estimated point and the second point in the second image, and comparing each back projection error with a threshold. The testing comprises for each first point, determining a correction term based on an estimation of the depth of the first point in the first image and an estimation of the movement between the first and second images, and determining the threshold associated with the first point by using said correction term.

公开(公告)号：US10312889B2

公开(公告)日：2019-06-04

申请号：US15605541

申请日：2017-05-25

Applicant: STMicroelectronics SA

Inventor： Denis Pache ,  Stephane Le Tual ,  Hanae Zegmout

IPC: H03K3/42 ,  G06F1/10 ,  H03M1/12 ,  H01L31/08 ,  H03K3/36

Abstract: The present disclosure relates to a device for generating a clock signal including a first photoresistor coupling a capacitive output node to a node receiving a first potential. A second photoresistor couples the capacitive node to a node receiving a second potential. The first and second photoresistors receive the same optical pulses of a mode-locked laser at instants in time offset by a first delay.

公开(公告)号：US10312240B2

公开(公告)日：2019-06-04

申请号：US15868901

申请日：2018-01-11

Applicant: STMICROELECTRONICS SA

Inventor： Hassan El Dirani ,  Yohann Solaro ,  Pascal Fonteneau

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/78 ,  G11C11/409 ,  H01L27/108

Abstract: A microelectronic component is capable of being used as a memory cell. The component includes a semiconductor layer resting on an insulating layer and including a doped source region of a first conductivity type, a doped drain region of a second conductivity type, and an intermediate region, non-doped or more lightly doped, with the second conductivity type, than the drain region, the intermediate region including first and second portions respectively extending from the drain region and from the source region. An insulated front gate electrode rests on the first portion. A first back gate electrode and a second back gate electrode are arranged under the insulating layer, respectively opposite the first portion and the second portion.