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公开(公告)号：US10340902B1
公开(公告)日：2019-07-02
申请号：US15966368
申请日：2018-04-30
Applicant: Analog Devices Global Unlimited Company
Inventor： Justin L. Fortier , Rachel Katumba
Abstract: Multiplying delay locked loops (MDLLs) with compensation for realignment error are provided. In certain implementations, an MDLL includes a control circuit, a multiplexed oscillator, and an integrate and subtract circuit. The control circuit selectively injects a reference clock signal into the multiplexed oscillator, which operates with an injected period when the reference clock signal is injected and with a natural period when the reference clock signal is not injected. The integrate and subtract circuit receives an oscillator signal from the multiplexed oscillator, and tunes an oscillation frequency of the multiplexed oscillator based on a difference between an integration of the oscillator signal over the injected period and an integration of the oscillator signal over the natural period.
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公开(公告)号：US10320280B2
公开(公告)日：2019-06-11
申请号：US15804437
申请日：2017-11-06
Applicant: Analog Devices Global Unlimited Company
Inventor： Aldrick S. Limjoco , Jefferson Albo Eco
Abstract: An LC filter circuit reduces an output voltage ripple of a switching power supply using coupled inductors in combination with a capacitor to form a notch filter, and aligning the notch region of the notch filter with a ripple frequency of the switching power supply to attenuate the frequency region of the fundamental ripple frequency by a larger amount than other frequencies.
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公开(公告)号：US10291214B2
公开(公告)日：2019-05-14
申请号：US15906160
申请日：2018-02-27
Applicant: Analog Devices Global Unlimited Company
Inventor： Bartholomeus Jacobus Thijssen , Eric Antonius Maria Klumperink , Bram Nauta , Philip Eugene Quinlan
Abstract: Clock systems with phase noise compensation are provided herein. In certain implementations, a clock system includes a phase noise detector for detecting a phase noise of a clock signal, and an adjustable delay circuit for generating an adjusted clock signal based on delaying the clock signal with a controllable delay. Additionally, the phase noise detector generates an error signal indicated the phase noise of the clock signal, and controls the delay of the adjustable delay circuit with the error signal over time to thereby compensate the clock signal for phase noise. Thus, the adjusted clock signal has reduced phase noise compared to the clock signal.
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公开(公告)号：US20190131404A1
公开(公告)日：2019-05-02
申请号：US15798182
申请日：2017-10-30
Applicant: Analog Devices Global Unlimited Company
Inventor： Edward John Coyne
IPC: H01L29/10 , H01L29/78 , H01L29/808 , H01L29/06 , H01L29/66
Abstract: A JFET is provided with a very low gate current. In tests the excess gate current above the theoretical minimum current for a similarly sized reverse biased p-n junction was not observed. The JFET includes a lightly doped top gate and doped regions beneath the drain of the JFET.
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公开(公告)号：US20190064222A1
公开(公告)日：2019-02-28
申请号：US15691379
申请日：2017-08-30
Applicant: Analog Devices Global Unlimited Company
Inventor： Seyed Amir Ali Danesh , John Stuart
Abstract: The present disclosure provides a system and method for the management of a monitor module in an electrical measurement system to determine an estimate of a transfer function of a first measurement sensor in the measurement system. The management comprises outputting a first control instruction for instructing the monitor module to determine an estimate of the transfer function of the first measurement sensor over a first individual run length of time, obtaining a first monitor result from the monitor module, the monitor result comprising the estimate of the transfer function of the first measurement sensor and generating a report based at least in part on the first monitor result.
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Patent Agency Ranking
公开(公告)号：US20190018467A1
公开(公告)日：2019-01-17
申请号：US16020812
申请日：2018-06-27
Applicant: Analog Devices Global Unlimited Company
Inventor： Stuart PATTERSON , Martin KESSLER , Prashant TRIPATHI
IPC: G06F1/26 , G06F13/40 , G06F13/362
Abstract: Disclosed herein are systems and techniques for adaptive use of multiple power supplies in a communication system. For example, in some embodiments, a slave device may include: an upstream transceiver to couple to an upstream link of a bus of a communication system; and circuitry to couple to the upstream link of the bus and to a local power supply, wherein the circuitry is to switch from providing the local power supply to power the slave device to providing bus power supplied by the upstream link of the bus to power the slave device.
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公开(公告)号：US10128859B1
公开(公告)日：2018-11-13
申请号：US15899883
申请日：2018-02-20
Applicant: Analog Devices Global Unlimited Company
Inventor： Sanjay Rajasekhar , Roberto Sergio Matteo Maurino
Abstract: Techniques are described to cancel kT/C sampling noise and residue amplifier sampling noise while also reducing power consumption in a pipelined analog-to-digital converter circuit.
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公开(公告)号：US11228310B2
公开(公告)日：2022-01-18
申请号：US17080785
申请日：2020-10-26
Applicant: Analog Devices Global Unlimited Company
Inventor： Ying Zhao , Alan O'Donnell , Michael James Twohig , Olly J. Kierse , James Thomas Sheeran , Michael C. W. Coln , Paul W. Stevens , Bruce A. Hecht , Padraig Fitzgerald , Mark Schirmer
Abstract: Optically isolated micromachined (MEMS) switches and related methods are described. The optically isolated MEMS switches described herein may be used to provide isolation between electronic devices. For example, the optically isolated MEMS switches of the types described herein can enable the use of separate grounds between the receiving electronic device and the control circuitry. Isolation of high-voltage signals and high-voltage power supplies can be achieved by using an optical isolator and a MEMS switch, where the optical isolator controls the state of the MEMS switch. In some embodiments, utilizing optical isolators to provide high voltages, the need for electric high-voltage sources such as high-voltage power supplies and charge pumps may be removed, thus removing the cause of potential damage to the receiving electronic device. In one example, the optical isolator and the MEMS switch may be co-packaged on the same substrate.
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79.发明授权公开(公告)号：US11101638B2
公开(公告)日：2021-08-24
申请号：US16153496
申请日：2018-10-05
Applicant: Analog Devices Global Unlimited Company
Inventor： Rajiv Nadig
Abstract: Provided herein are semiconductor dies including multiple controllers for operating over an extended temperature range. In certain embodiments, a semiconductor die includes multiple circuit modules, a temperature sensor that generates a detected temperature signal, an interface that communicates with an external host, a primary controller coupled to the interface and operable to control the circuit modules, and a secondary controller coupled to the interface. In response to the detected temperature signal indicating that the temperature of the semiconductor die exceeds a threshold temperature, the primary controller enables the secondary controller, which in turn disables the primary controller and at least a portion of the plurality of circuit modules to reduce heat dissipation.
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公开(公告)号：US11082051B2
公开(公告)日：2021-08-03
申请号：US15977171
申请日：2018-05-11
Applicant: Analog Devices Global Unlimited Company
Inventor： Gordon John Allan
Abstract: Apparatus and methods for timing offset compensation of frequency synthesizers are provided herein. In certain embodiments, an electronic system includes a frequency synthesizer, such as a fractional-N phase-locked loop (PLL), which generates an output clock signal based on timing of a reference clock signal. Additionally, the electronic system includes an integer PLL configured to compensate for a timing offset, such as a phase offset and/or frequency offset, of the frequency synthesizer based on timing of the output clock signal.
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