Universal controller for peripheral devices in a computing system
    71.
    发明申请
    Universal controller for peripheral devices in a computing system 有权
    通用控制器,用于计算系统中的外围设备

    公开(公告)号:US20050114581A1

    公开(公告)日:2005-05-26

    申请号:US10880331

    申请日:2004-06-29

    CPC classification number: G06F13/4022 H04L69/14

    Abstract: An integrated controller is provided for controlling communications with a plurality of peripheral devices. The integrated controller includes a bus interface for processing communications with a processor; a switch for routing communications between the processor and one or more of the peripheral devices; and a plurality of controllers, where each of the controllers provide an interface to at least one peripheral device. The controllers include at least one PHY controller for a corresponding peripheral device that provides an electrical interface to a connection, such as a network connection. The controllers also include at least one MAC controller that stores and forwards packets to and from a network connection.

    Abstract translation: 提供集成控制器用于控制与多个外围设备的通信。 集成控制器包括用于处理与处理器的通信的总线接口; 用于路由处理器与一个或多个外围设备之间的通信的交换机; 以及多个控制器,其中每个控制器提供与至少一个外围设备的接口。 控制器包括至少一个PHY控制器,用于相应的外围设备,其提供诸如网络连接的连接的电接口。 控制器还包括至少一个MAC控制器,其存储和转发分组到网络连接和从网络连接转发分组。

    Mixed-mode next/echo canceller for pulse amplitude modulated (PAM) signals
    72.
    发明授权
    Mixed-mode next/echo canceller for pulse amplitude modulated (PAM) signals 有权
    混合模式下一个/回波消除器用于脉冲幅度调制(PAM)信号

    公开(公告)号:US06584159B1

    公开(公告)日:2003-06-24

    申请号:US09188625

    申请日:1998-11-09

    CPC classification number: H04B3/23

    Abstract: A mixed-mode crosstalk canceller is disclosed that performs crosstalk cancellation in the continuous time domain. The disclosed mixed-mode crosstalk canceller processes the pulse amplitude modulated (PAM) digital signal to be transmitted as well as the received signal to compensate for the crosstalk between the transmit and receive signals. The output of the crosstalk canceller is subtracted from the received signal in the continuous time domain. Thus, the transmit symbol clock and the receive symbol clock can be asynchronous. The tap weights for the crosstalk cancellation are illustratively obtained using a modified version of the least mean square (LMS) algorithm for discrete time signals. The modified least mean square (LMS) algorithm is applied for continuous time signals that are derived from different clocks. Since, the LMS algorithm requires a costly multiplication of the error signal, e(t), and the digital transmit signal, xk(t), and it is only necessary to go in the direction of the gradient with the steepest decent, computational gains are achieved using a correlation multiplier that quantizes e(t) and xk(t) with only one or two bits. The quantized version of the error signal, e(t), indicates the sign of the error (positive or negative) and is obtained in the illustrative embodiment by comparing the error signal to zero. A crosstalk canceller updates each tap weight utilizing the disclosed correlation multiplier that provides a signal indicating whether the tap weight needs to be increased or decreased to a charge pump that produces a current in the proper direction.

    Abstract translation: 公开了在连续时域中执行串扰消除的混合模式串扰消除器。 所公开的混合模式串扰消除器处理要传输的脉冲幅度调制(PAM)数字信号以及接收信号以补偿发射和接收信号之间的串扰。 从连续时域的接收信号中减去串扰消除器的输出。 因此,发送符号时钟和接收符号时钟可以是异步的。 使用离散时间信号的最小均方(LMS)算法的修改版本说明性地获得用于串扰消除的抽头权重。 改进的最小均方(LMS)算法适用于从不同时钟导出的连续时间信号。 因为,LMS算法需要错误信号e(t)和数字发射信号xk(t)的昂贵的乘法,并且仅需要沿着具有最陡的体面计算增益的梯度方向 使用仅使用一个或两个位量化e(t)和xk(t)的相关乘法器来实现。 误差信号e(t)的量化版本表示误差的符号(正或负),并且在说明性实施例中通过将误差信号与零进行比较来获得。 串扰消除器利用公开的相关乘法器来更新每个抽头权重,该相关乘法器提供指示抽头权重是否需要增加或减小到在适当方向产生电流的电荷泵的信号。

    Digital signal processor having instruction set with an xK function using reduced look-up table
    74.
    发明授权
    Digital signal processor having instruction set with an xK function using reduced look-up table 有权
    数字信号处理器具有使用减少的查找表的具有xK功能的指令集

    公开(公告)号:US09207910B2

    公开(公告)日:2015-12-08

    申请号:US12362874

    申请日:2009-01-30

    CPC classification number: G06F7/556 G06F1/035 G06F2101/10

    Abstract: A digital signal processor is provided having an instruction set with an xK function that uses a reduced look-up table. The disclosed digital signal processor evaluates an xK function for an input value, x, by computing Log(x) in hardware; multiplying the Log(x) value by K; and determining the xK function by applying an exponential function in hardware to a result of the multiplying step. One or more of the computation of Log(x) and the exponential function employ at least one look-up table having entries with a fewer number of bits than a number of bits in the input value, x.

    Abstract translation: 提供了一种数字信号处理器,其具有使用减少的查找表的具有xK功能的指令集。 所公开的数字信号处理器通过在硬件中计算Log(x)来评估输入值x的xK函数; 将Log(x)值乘以K; 以及通过在硬件中对乘法步骤的结果应用指数函数来确定xK函数。 Log(x)和指数函数的计算中的一个或多个使用至少一个查找表,其具有比输入值x中的位数少的位数较少的条目。

    METHOD AND APPARATUS FOR JOINT EQUALIZATION AND DECODING OF MULTIDIMENSIONAL CODES TRANSMITTED OVER MULTIPLE SYMBOL DURATIONS
    75.
    发明申请
    METHOD AND APPARATUS FOR JOINT EQUALIZATION AND DECODING OF MULTIDIMENSIONAL CODES TRANSMITTED OVER MULTIPLE SYMBOL DURATIONS 有权
    用于联合平均化和解码通过多个符号延迟传输的多维码的方法和装置

    公开(公告)号:US20120128056A1

    公开(公告)日:2012-05-24

    申请号:US13302707

    申请日:2011-11-22

    Abstract: A method and apparatus are disclosed for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. An RSSE scheme is disclosed that cancels the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. The disclosed RSSE technique for multidimensional codes applies where the number of trellis code dimensions exceeds the number of channels. The disclosed RSSE decoder computes the intersymbol interference caused by previously decoded multidimensional code symbols and subtracts the intersymbol interference from the received signal. In addition, a branch metrics unit compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol.

    Abstract translation: 公开了一种用于执行在多个符号持续时间上发送的多维码的联合均衡和解码的方法和装置。 公开了一种RSSE方案,其消除由同一多维码符号内的其他符号分量引起的内部符号干扰。 所披露的用于多维码的RSSE技术适用于网格码数量超过信道数量的地方。 所公开的RSSE解码器计算由先前解码的多维码符号引起的符号间干扰,并从接收信号中减去符号间干扰。 此外,分支度量单元补偿由相同的多维码符号内的其他符号分量引起的内部符号干扰。

    METHODS AND APPARATUS FOR DIRECT SYNTHESIS OF RF SIGNALS USING DELTA-SIGMA MODULATOR
    76.
    发明申请
    METHODS AND APPARATUS FOR DIRECT SYNTHESIS OF RF SIGNALS USING DELTA-SIGMA MODULATOR 有权
    使用DELTA-SIGMA调制器直接合成RF信号的方法和装置

    公开(公告)号:US20120014426A1

    公开(公告)日:2012-01-19

    申请号:US13254397

    申请日:2009-03-31

    CPC classification number: H03M7/3042 H03M7/3024

    Abstract: Methods and apparatus are provided for direct synthesis of RF signals using a delta-sigma modulator. An RF signal is synthesized from an input signal by quantizing the input signal using a quantizer, such as a one bit quantizer; determining a quantization error associated with the quantizer; generating an error prediction value using an error predictive filter, wherein the error predictive filter comprises one or more filter zeroes on a unit circle for one or more desired frequencies of f1, f2, . . . fn and one or more filter poles having a magnitude inside the unit circle and a frequency substantially equal to the one or more desired frequencies of f1, f2, . . . fn; and subtracting the error prediction value from the input signal. The filter poles have a magnitude that reduces a boost provided out-of-band.

    Abstract translation: 提供了使用Δ-Σ调制器直接合成RF信号的方法和装置。 通过使用诸如一位量化器的量化器量化输入信号,从输入信号合成RF信号; 确定与所述量化器相关联的量化误差; 使用误差预测滤波器生成误差预测值,其中所述误差预测滤波器包括在f1,f2的一个或多个期望频率的单位圆上的一个或多个滤波器零点。 。 。 fn和一个或多个具有在单位圆内的幅度的滤波器极,并且频率基本上等于f1,f2的一个或多个期望频率。 。 。 fn 并从输入信号中减去误差预测值。 滤波器极具有降低带外提升的幅度。

    Methods and apparatus for performing reduced complexity discrete fourier transforms using interpolation
    77.
    发明授权
    Methods and apparatus for performing reduced complexity discrete fourier transforms using interpolation 有权
    使用插值执行复杂度降低的离散傅里叶变换的方法和装置

    公开(公告)号:US08015226B2

    公开(公告)日:2011-09-06

    申请号:US11859437

    申请日:2007-09-21

    CPC classification number: G06F17/141

    Abstract: Methods and apparatus are provided for performing reduced complexity discrete Fourier transforms using interpolation An input sequence of length N is transformed by extending the input sequence to an extended input sequence of length M, where M is greater than N (a power of two greater than N); performing a discrete Fourier Transform (DFT), such as a power-of-two DFT, on the extended input sequence to obtain an interpolated sequence; and applying a conversion matrix to the interpolated sequence to obtain a DFT output for the input sequence of length N. The input sequence of length N can be extended to an extended input sequence of length M, for example, by employing a zero padding technique, a cyclic extension technique, a windowing of a cyclic extended sequence technique or a resampling-based interpolation technique to extend the input sequence. The conversion matrix is substantially a sparse matrix.

    Abstract translation: 提供的方法和装置用于使用插值来执行降低复杂度的离散付里叶变换通过将输入序列扩展为长度为M的扩展输入序列来变换长度为N的输入序列,其中M大于N(2的幂大于N ); 在扩展输入序列上执行离散傅立叶变换(DFT),例如二次幂DFT,以获得内插序列; 以及将转换矩阵应用到内插序列以获得长度为N的输入序列的DFT输出。例如,通过采用零填充技术,长度N的输入序列可以扩展到长度为M的扩展输入序列, 循环扩展技术,循环扩展序列技术的开窗或基于重新采样的插值技术来扩展输入序列。 转换矩阵基本上是稀疏矩阵。

    Methods and apparatus for soft decision decoding using reliability values based on a log base two function
    78.
    发明授权
    Methods and apparatus for soft decision decoding using reliability values based on a log base two function 有权
    使用基于日志基函数的可靠性值进行软判决解码的方法和装置

    公开(公告)号:US08001452B2

    公开(公告)日:2011-08-16

    申请号:US11561296

    申请日:2006-11-17

    Applicant: Kameran Azadet

    Inventor: Kameran Azadet

    CPC classification number: H03M13/1111 H03M13/6577

    Abstract: Methods and apparatus are provided for soft decision decoding using reliability values based on a log base two function. A signal is processed to determine one or more reliability values for a soft decision decoder by computing one or more log-likelihood ratio (LLR) values using a log base two function. The soft decision decoder may employ, for example, a belief propagation algorithm. The soft decision decoder can decode, for example, Low-Density Parity Check codes or turbo codes.

    Abstract translation: 提供了使用基于日志基函数的可靠性值进行软判决解码的方法和装置。 处理信号以通过使用日志基二函数计算一个或多个对数似然比(LLR)值来确定软判决解码器的一个或多个可靠性值。 软判决解码器可以采用例如置信传播算法。 软判决解码器可解码例如低密度奇偶校验码或turbo码。

    METHODS AND APPARATUS FOR SIMULTANEOUS ESTIMATION OF FREQUENCY OFFSET AND CHANNEL RESPONSE FOR MU-MIMO OFDMA
    79.
    发明申请
    METHODS AND APPARATUS FOR SIMULTANEOUS ESTIMATION OF FREQUENCY OFFSET AND CHANNEL RESPONSE FOR MU-MIMO OFDMA 有权
    用于MU-MIMO OFDMA的频率偏移和频道响应的同时估计的方法和装置

    公开(公告)号:US20100304687A1

    公开(公告)日:2010-12-02

    申请号:US12474344

    申请日:2009-05-29

    CPC classification number: H04L27/2657 H04L25/0202 H04L27/2675 H04L27/2695

    Abstract: Methods and apparatus are provided for simultaneous estimation of frequency offset and channel response for a communication system, such as a MU-MIMO communication system. An iterative method is provided for estimating frequency offset and channel response for a plurality of frequency resources. The channel response is estimated for a set of users sharing a given one of the frequency resources. In addition, the frequency offset is estimated for the users in the set, wherein the channel response and frequency offset of users not in the set are maintained at their latest updated values. Initially, the channel response of a user can be an ideal channel response and the frequency offset can be approximately zero.

    Abstract translation: 提供了用于同时估计诸如MU-MIMO通信系统的通信系统的频率偏移和信道响应的方法和装置。 提供了一种用于估计多个频率资源的频率偏移和信道响应的迭代方法。 对于共享给定的一个频率资源的一组用户估计信道响应。 此外,针对集合中的用户估计频率偏移,其中不在集合中的用户的信道响应和频率偏移保持在其最新的更新值。 最初,用户的信道响应可以是理想的信道响应,并且频率偏移可以近似为零。

    Methods and apparatus for decorrelating quantization noise in a delta-sigma modulator
    80.
    发明授权
    Methods and apparatus for decorrelating quantization noise in a delta-sigma modulator 有权
    用于在Δ-Σ调制器中去量化噪声的方法和装置

    公开(公告)号:US07834788B2

    公开(公告)日:2010-11-16

    申请号:US12415012

    申请日:2009-03-31

    CPC classification number: H03M7/3006 H03M7/3042

    Abstract: Methods and apparatus are provided for decorrelating quantization noise in a delta-sigma modulator. An input signal is quantized using a predictive delta-sigma modulator, by quantizing the input signal using a quantizer; determining a quantization error associated with the quantizer by subtracting an input to the quantizer from an output of the quantizer; measuring a correlation coefficient between the quantization error and an input to the quantizer; reducing the measured correlation by subtracting a multiple of the input to the quantizer from the quantization error, wherein the multiple is based on the correlation coefficient; generating an error prediction value using an error predictive filter; and subtracting the error prediction value from the input signal.

    Abstract translation: 提供了用于在Δ-Σ调制器中去量化量化噪声的方法和装置。 使用预测Δ-Σ调制器通过使用量化器量化输入信号来量化输入信号; 通过从量化器的输出中减去量化器的输入来确定与量化器相关联的量化误差; 测量量化误差与量化器的输入之间的相关系数; 通过从所述量化误差中减去所述量化器的输入的倍数来减少所测量的相关性,其中所述多个是基于所述相关系数; 使用误差预测滤波器生成误差预测值; 并从输入信号中减去误差预测值。

Patent Agency Ranking