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82 条记录 (耗时 0.023 秒)

    Nonvolatile memory devices and methods of operating the same
    71.
    发明授权
    Nonvolatile memory devices and methods of operating the same 有权
    非易失性存储器件及其操作方法

    公开(公告)号：US07948019B2

    公开(公告)日：2011-05-24

    申请号：US12071451

    申请日：2008-02-21

    申请人： Young-gu Jin ,  Ki-ha Hong ,  Yoon-dong Park ,  Jai-kwang Shin ,  Suk-pil Kim

    发明人： Young-gu Jin ,  Ki-ha Hong ,  Yoon-dong Park ,  Jai-kwang Shin ,  Suk-pil Kim

    IPC分类号： H01L29/788

    CPC分类号： G11C16/0416 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/0673 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7881

    摘要： Example embodiments include nonvolatile memory devices that have good operation performance and may be made in a highly integrated structure, and methods of operating the same. Example embodiments of the nonvolatile memory devices include a substrate electrode, and a semiconductor channel layer on the substrate electrode, a floating gate electrode on the substrate electrode, wherein a portion of the floating gate electrode faces the semiconductor channel layer, a control gate electrode on the floating gate electrode, and wherein a distance between a portion of the floating gate electrode and the substrate electrode is smaller than a distance between the semiconductor channel layer and the substrate electrode wherein charge tunneling occurs.

    摘要翻译： 示例性实施例包括具有良好操作性能并且可以以高度集成的结构制造的非易失性存储器件及其操作方法。 非易失性存储器件的示例性实施例包括衬底电极和衬底电极上的半导体沟道层，衬底电极上的浮置栅电极，其中浮置栅电极的一部分面向半导体沟道层，控制栅极电极 所述浮置栅极电极，并且其中所述浮置栅电极的一部分与所述基板电极之间的距离小于半导体沟道层与发生电荷隧道的基板电极之间的距离。

    Ferroelectric memory devices and operating methods thereof
    72.
    发明申请
    Ferroelectric memory devices and operating methods thereof 有权
    铁电存储器件及其操作方法

    公开(公告)号：US20110075467A1

    公开(公告)日：2011-03-31

    申请号：US12923131

    申请日：2010-09-03

    申请人： Ki-ha Hong ,  Jeong-seob Kim ,  Jai-kwang Shin

    发明人： Ki-ha Hong ,  Jeong-seob Kim ,  Jai-kwang Shin

    IPC分类号： G11C11/22 ,  H01L29/82 ,  G11C7/00

    CPC分类号： G11C11/22 ,  G11C11/223 ,  H01L21/28291 ,  H01L27/11597 ,  H01L27/1203 ,  H01L29/1606 ,  H01L29/78391

    摘要： A ferroelectric memory device having a NAND array of a plurality of ferroelectric memory cells includes: a fully depleted channel layer; a gate electrode layer; and a ferroelectric layer located between the channel layer and the gate electrode layer. The data of the plurality of ferroelectric memory cells is erased by applying a first erase voltage to a bit line and a common source line and applying a second erase voltage to a string selection line and a ground selection line.

    摘要翻译： 具有多个铁电存储单元的NAND阵列的铁电存储器件包括：完全耗尽的沟道层; 栅电极层; 以及位于沟道层和栅电极层之间的铁电层。 通过对位线和公共源极线施加第一擦除电压并向串选择线和地选择线施加第二擦除电压来擦除多个铁电存储单元的数据。

    Power electronic devices, methods of manufacturing the same, and integrated circuit modules including the same
    73.
    发明申请
    Power electronic devices, methods of manufacturing the same, and integrated circuit modules including the same 有权
    电力电子装置及其制造方法以及包括其的集成电路模块

    公开(公告)号：US20110068370A1

    公开(公告)日：2011-03-24

    申请号：US12923126

    申请日：2010-09-03

    申请人： Jong-seob Kim ,  Ki-ha Hong ,  Jae-joon Oh ,  Hyuk-soon Choi ,  In-jun Whang ,  Jai-kwang Shin

    发明人： Jong-seob Kim ,  Ki-ha Hong ,  Jae-joon Oh ,  Hyuk-soon Choi ,  In-jun Whang ,  Jai-kwang Shin

    IPC分类号： H01L29/778 ,  H01L21/335

    CPC分类号： H01L29/207 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

    摘要： Power electronic devices including 2-dimensional electron gas (2DEG) channels and methods of manufacturing the same. A power electronic device includes lower and upper material layers for forming a 2DEG channel, and a gate contacting an upper surface of the upper material layer. A region below the gate of the 2DEG channel is an off region where the density of a 2DEG is reduced or zero. The entire upper material layer may be continuous and may have a uniform thickness. A region of the upper material layer under the gate contains an impurity for reducing or eliminating a lattice constant difference between the lower and upper material layers.

    摘要翻译： 包括二维电子气体（2DEG）通道的电力电子装置及其制造方法。 电力电子设备包括用于形成2DEG通道的下部和上部材料层，以及与上部材料层的上表面接触的栅极。 2DEG通道的栅极下方的区域是2DEG的密度减小或为零的截止区域。 整个上部材料层可以是连续的并且可以具有均匀的厚度。 在栅极下方的上部材料层的区域包含用于减少或消除下部和上部材料层之间的晶格常数差的杂质。

    SPIN TRANSISTOR AND METHOD OF OPERATING THE SAME
    75.
    发明申请
    SPIN TRANSISTOR AND METHOD OF OPERATING THE SAME 有权
    旋转晶体管及其操作方法

    公开(公告)号：US20100271112A1

    公开(公告)日：2010-10-28

    申请号：US12742221

    申请日：2008-11-04

    申请人： Ki-Ha Hong ,  Sung-Hoon Lee ,  Jong-Seob Kim ,  Jai-Kwang Shin

    发明人： Ki-Ha Hong ,  Sung-Hoon Lee ,  Jong-Seob Kim ,  Jai-Kwang Shin

    IPC分类号： H03K3/01 ,  H01L29/78

    CPC分类号： H01L29/66984 ,  B82Y25/00 ,  H01F1/401 ,  H01F1/404 ,  H01F10/1933 ,  H01F10/1936 ,  H01F10/3254 ,  H01F10/3295 ,  H01L29/82

    摘要： Disclosed are a spin transistor and a method of operating the spin transistor. The disclosed spin transistor includes a channel formed of a magnetic material selectively passing a spin-polarized electron having a specific direction, a source formed of a magnetic material, a drain, and a gate electrode. When a predetermined voltage is applied to the gate electrode, the channel selectively passes a spin-polarized electron having a specific direction and thus, the spin transistor is selectively turned on.

    摘要翻译： 公开了自旋晶体管和操作自旋晶体管的方法。 所公开的自旋晶体管包括由选择性地通过具有特定方向的自旋极化电子的磁性材料形成的沟道，由磁性材料形成的源极，漏极和栅电极。 当预定电压施加到栅电极时，沟道选择性地通过具有特定方向的自旋极化电子，因此自旋晶体管选择性地导通。

    Spin field effect logic devices
    77.
    发明申请
    Spin field effect logic devices 有权
    旋转场效应逻辑器件

    公开(公告)号：US20100176428A1

    公开(公告)日：2010-07-15

    申请号：US12654349

    申请日：2009-12-17

    申请人： Ki-ha Hong ,  Jong-seob Kim ,  Jai-kwang Shin

    发明人： Ki-ha Hong ,  Jong-seob Kim ,  Jai-kwang Shin

    IPC分类号： H01L29/82

    CPC分类号： H01L29/66984 ,  B82Y25/00 ,  H01F1/401 ,  H01F10/1936 ,  H01F10/3254

    摘要： Provided are spin field effect logic devices, the logic devices including: a gate electrode; a channel formed of a magnetic material above the gate electrode to selectively transmit spin-polarized electrons; a source on the channel; and a drain and an output electrode on the channel outputting electrons transmitted from the source. The gate electrode may control a magnetization state of the channel in order to selectively transmit the electrons injected from the source to the channel.

    摘要翻译： 提供的是自旋场效应逻辑器件，逻辑器件包括：栅电极; 由栅电极上方的磁性材料形成的沟道，以选择性地透射自旋极化电子; 频道上的来源; 以及沟道上的漏极和输出电极，输出从源极发射的电子。 栅电极可以控制通道的磁化状态，以选择性地将从源引入的电子传输到通道。

    Spin field effect transistor using half metal and method of manufacturing the same
    78.
    发明申请
    Spin field effect transistor using half metal and method of manufacturing the same 有权
    使用半金属的自旋场效应晶体管及其制造方法

    公开(公告)号：US20090121267A1

    公开(公告)日：2009-05-14

    申请号：US12081283

    申请日：2008-04-14

    申请人： Ki-ha Hong ,  Sung-hoon Lee ,  Jong-seob Kim ,  Jai kwang Shin

    发明人： Ki-ha Hong ,  Sung-hoon Lee ,  Jong-seob Kim ,  Jai kwang Shin

    IPC分类号： H01L29/82

    CPC分类号： H01L29/66984 ,  B82Y25/00 ,  H01F1/401 ,  H01F1/404 ,  H01F10/1933 ,  H01F10/1936 ,  H01F10/3254 ,  H01F10/3295 ,  H01L29/82

    摘要： A spin field effect transistor may include at least one gate electrode, a channel layer, a first stack and a second stack separate from each other on a substrate, wherein the channel layer is formed of a half metal. The half metal may be at least one material selected from the group consisting of chrome oxide (CrO2), magnetite (Fe3O4), a double perovskite structure material, a Heusler alloy, NiMnSb, La(1-x)AxMnO3 (A=Ca, Ba, Sr, x˜0.3), and GaN doped with Cu, and the double perovskite structure material is expressed as a chemical composition of A2BB′O6, and a material corresponding to A is Ca, Sr, or Ba, a material corresponding to B is a 3d orbital transition metal, and a material corresponding to B′ is a 4d orbital transition metal. The 3d orbital transition metal may be Fe or Co, and the 4d orbital transition metal is Mo or Re.

    摘要翻译： 自旋场效应晶体管可以包括在基板上彼此分离的至少一个栅电极，沟道层，第一堆叠和第二堆叠，其中沟道层由半金属形成。 半金属可以是选自氧化铬（CrO 2），磁铁矿（Fe 3 O 4），双钙钛矿结构材料，Heusler合金，NiMnSb，La（1-x）AxMnO 3（A = Ca， Ba，Sr，x〜0.3）和掺杂有Cu的GaN，双钙钛矿结构材料表示为A2BB'O6的化学组成，对应于A的材料为Ca，Sr或Ba，与 B是3d轨道过渡金属，对应于B'的材料是4d轨道过渡金属。 3d轨道过渡金属可以是Fe或Co，4d轨道过渡金属是Mo或Re。