公开(公告)号：US08258026B2

公开(公告)日：2012-09-04

申请号：US13298284

申请日：2011-11-16

Applicant: Constantin Bulucea

Inventor： Constantin Bulucea

IPC: H01L21/8238

CPC classification number: H01L21/823807 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/1203

Abstract: An insulated-gate field-effect transistor (220U) is provided with an empty-well region for achieving high performance. The concentration of the body dopant reaches a maximum at a subsurface location no more than 10 times deeper below the upper semiconductor surface than the depth of one of a pair of source/drain zones (262 and 264), decreases by at least a factor of 10 in moving from the subsurface location along a selected vertical line (136U) through that source/drain zone to the upper semiconductor surface, and has a logarithm that decreases substantially monotonically and substantially inflectionlessly in moving from the subsurface location along the vertical line to that source/drain zone. Each source/drain zone has a main portion (262M or 264M) and a more lightly doped lateral extension (262E or 264E). Alternatively or additionally, a more heavily doped pocket portion (280) of the body material extends along one of the source/drain zones.

Abstract translation: 绝缘栅场效应晶体管（220U）具有用于实现高性能的空井区域。 身体掺杂物的浓度在上半导体表面下方比在一对源/漏区（262和264）之一的深度不超过10倍的地下位置处达到最大值，减小至少一个因子 10沿着沿着选择的垂直线（136U）通过该源极/漏极区域移动到上半导体表面的地下位置移动，并且具有从沿着垂直线的地下位置移动到基本单调和基本上无穷地基本上单调减小的对数， 源/漏区。 每个源/漏区具有主要部分（262M或264M）和更轻掺杂的横向延伸（262E或264E）。 替代地或另外地，主体材料的更重掺杂的凹穴部分（280）沿着源极/漏极区域中的一个延伸。

公开(公告)号：US20120098036A1

公开(公告)日：2012-04-26

申请号：US12908514

申请日：2010-10-20

Applicant: Sandeep Bahl ,  Constantin Bulucea

Inventor： Sandeep Bahl ,  Constantin Bulucea

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/0661 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

Abstract: The Si substrate of a group III-N HEMT is formed in layers that define a p-n junction which electrically isolates an upper region of the Si substrate from a lower region of the Si substrate. As a result, the upper region of the Si substrate can electrically float, thereby obtaining a full buffer breakdown voltage, while the lower region of the Si substrate can be attached to a package by way of a conductive epoxy, thereby significantly improving the thermal conductivity of the group III-N HEMT and minimizing undesirable floating-voltage regions.

Abstract translation: 组III-N HEMT的Si衬底形成为限定将Si衬底的上部区域与Si衬底的下部区域电隔离的p-n结的层。 结果，Si衬底的上部区域可以电浮动，从而获得全缓冲击穿电压，而Si衬底的下部区域可以通过导电环氧树脂附着到封装上，从而显着提高导热性 的III-N HEMT组，并且使不期望的浮动电压区域最小化。

公开(公告)号：US20120098035A1

公开(公告)日：2012-04-26

申请号：US12908458

申请日：2010-10-20

Applicant: Sandeep Bahl ,  Constantin Bulucea

Inventor： Sandeep Bahl ,  Constantin Bulucea

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

Abstract: The buffer breakdown of a group III-N HEMT on a p-type Si substrate is significantly increased by forming an n-well in the p-type Si substrate to lie directly below the metal drain region of the group III-N HEMT. The n-well forms a p-n junction which becomes reverse biased during breakdown, thereby increasing the buffer breakdown by the reverse-biased breakdown voltage of the p-n junction and allowing the substrate to be grounded. The buffer layer of a group III-N HEMT can also be implanted with n-type and p-type dopants which are aligned with the p-n junction to minimize any leakage currents at the junction between the substrate and the buffer layer.

Abstract translation: 通过在p型Si衬底中形成n阱以直接位于III-NHEMT族金属漏极区的下方，在p型Si衬底上的III-N HEMT组的缓冲击穿显着增加。 n阱形成在击穿期间变得反向偏置的p-n结，从而通过p-n结的反向偏置击穿电压增加缓冲器击穿，并允许衬底接地。 III-N型HEMT的缓冲层也可以注入与p-n结对准的n型和p型掺杂剂，以最小化衬底和缓冲层之间的接合处的任何漏电流。

公开(公告)号：US08129262B1

公开(公告)日：2012-03-06

申请号：US12607041

申请日：2009-10-27

Applicant: Constantin Bulucea ,  Fu-Cheng Wang ,  Prasad Chaparala

Inventor： Constantin Bulucea ,  Fu-Cheng Wang ,  Prasad Chaparala

IPC: H01L21/04

CPC classification number: H01L29/1083 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/105

Abstract: Fabrication of an insulated-gate field-effect transistor (110) entails separately introducing three body-material dopants, typically through an opening in a mask, into body material (50) of a semiconductor body so as to reach respective maximum dopant concentrations at three different vertical locations in the body material. A gate electrode (74) is subsequently defined after which a pair of source/drain zones (60 and 62), each having a main portion (60M or 80M) and a more lightly doped lateral extension (60E or 62E), are formed in the semiconductor body. An anneal is performed during or subsequent to introduction of semiconductor dopant that defines the source/drain zones. The body material is typically provided with at least one more heavily doped halo pocket portion (100 and 102) along the source/drain zones. The vertical dopant profile resulting from the body-material dopants alleviates punchthrough and reduces current leakage.

Abstract translation: 绝缘栅场效应晶体管（110）的制造需要通常将三个体材料掺杂剂（通常通过掩模中的开口）引入半导体主体的主体材料（50）中，以便在三层中达到各自的最大掺杂剂浓度 不同垂直位置的身材。 随后限定栅电极（74），之后在每一个具有主要部分（60M或80M）和更轻掺杂的侧向延伸部（60E或62E）的一对源极/漏极区域（60和62）上形成 半导体体。 在引入定义源极/漏极区的半导体掺杂剂期间或之后进行退火。 主体材料通常沿着源极/漏极区域设置有至少一个更重掺杂的卤素口袋部分（100和102）。 由体材料掺杂物产生的垂直掺杂剂分布减轻穿透并减少电流泄漏。

公开(公告)号：US08101479B2

公开(公告)日：2012-01-24

申请号：US12382977

申请日：2009-03-27

Applicant: D. Courtney Parker ,  Donald M. Archer ,  Sandeep R. Bahl ,  Constantin Bulucea ,  William D. French ,  Peter B. Johnson ,  Jeng-Jiun Yang

Inventor： D. Courtney Parker ,  Donald M. Archer ,  Sandeep R. Bahl ,  Constantin Bulucea ,  William D. French ,  Peter B. Johnson ,  Jeng-Jiun Yang

IPC: H01L21/336

CPC classification number: H01L29/0847 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/518 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66659 ,  H01L29/7835

Abstract: A gate electrode (302) of a field-effect transistor (102) is defined above, and vertically separated by a gate dielectric layer (300) from, a channel-zone portion (284) of body material of a semiconductor body. Semiconductor dopant is introduced into the body material to define a more heavily doped pocket portion (290) using the gate electrode as a dopant-blocking shield. A spacer (304T) having a dielectric portion situated along the gate electrode, a dielectric portion situated along the body, and a filler portion (SC) largely occupying the space between the other two spacer portions is provided. Semiconductor dopant is introduced into the body to define a pair of source/drain portions (280M and 282M) using the gate electrode and spacer as a dopant-blocking shield. The filler spacer portion is removed to convert the spacer to an L shape (304). Electrical contacts (310 and 312) are formed respectively to the source/drain portions.

Abstract translation: 场效应晶体管（102）的栅电极（302）定义在上面，并由半导体本体的主体材料的沟道区部分（284）由栅介质层（300）垂直分隔开。 半导体掺杂剂被引入主体材料中以限定使用栅电极作为掺杂剂阻挡屏蔽的更重掺杂的凹穴部分（290）。 具有沿着栅电极设置的电介质部分的隔离物（304T），设置在主体上的电介质部分和大部分占据其它两个间隔部分之间空间的填充部分（SC）。 半导体掺杂剂被引入体内以使用栅极电极和间隔物作为掺杂剂阻挡屏蔽来限定一对源/漏部分（280M和282M）。 去除填料垫片部分以将间隔件转换成L形（304）。 电触点（310和312）分别形成到源极/漏极部分。

公开(公告)号：US08084827B2

公开(公告)日：2011-12-27

申请号：US12382971

申请日：2009-03-27

Applicant: Constantin Bulucea ,  William D. French ,  Donald M. Archer ,  Jeng-Jiun Yang ,  Sandeep R. Bahl ,  D. Courtney Parker

Inventor： Constantin Bulucea ,  William D. French ,  Donald M. Archer ,  Jeng-Jiun Yang ,  Sandeep R. Bahl ,  D. Courtney Parker

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L29/1083 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/26586 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823892 ,  H01L27/088 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/518 ,  H01L29/66659 ,  H01L29/7835

Abstract: A group of high-performance like-polarity insulated-gate field-effect transistors (100, 108, 112, 116, 120, and 124 or 102, 110, 114, 118, 122, and 126) have selectably different configurations of lateral source/drain extensions, halo pockets, and gate dielectric thicknesses suitable for a semiconductor fabrication platform that provides a wide variety of transistors for analog and/or digital applications. Each transistor has a pair of source/drain zones, a gate dielectric layer, and a gate electrode. Each source/drain zone includes a main portion and a more lightly doped lateral extension. The lateral extension of one of the source/drain zones of one of the transistors is more heavily doped or/and extends less deeply below the upper semiconductor surface than the lateral extension of one of the source/drain zones of another of the transistors.

Abstract translation: 一组高性能类似极性的绝缘栅场效应晶体管（100,108,112,116,120和124或102,110,114,118,122和126）具有可选择地不同的侧向源 /漏极延伸，光晕口和栅介质厚度，适用于为模拟和/或数字应用提供各种晶体管的半导体制造平台。 每个晶体管具有一对源极/漏极区，栅极介电层和栅电极。 每个源极/漏极区域包括主要部分和更轻掺杂的横向延伸部分。 一个晶体管的一个源极/漏极区域的横向延伸比另一个晶体管的源极/漏极区域之一的横向延伸更深地掺杂或/并且在上部半导体表面之下更深地延伸。

公开(公告)号：US08034679B1

公开(公告)日：2011-10-11

申请号：US12896801

申请日：2010-10-01

Applicant: Constantin Bulucea

Inventor： Constantin Bulucea

IPC: H01L21/8238

CPC classification number: H01L21/823807 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/1203

Abstract: An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 220, 220U, 220V, 220W, 380, or 480) is fabricated so as to have a hypoabrupt vertical dopant profile below one (104 or 264) of its source/drain zones for reducing the parasitic capacitance along the pn junction between that source/drain zone, normally serving as the drain, and adjoining body material (108 or 268). In particular, the concentration of semiconductor dopant which defines the conductivity type of the body material increases by at least a factor of 10 in moving from that source/drain zone down to an underlying body-material location no more than 10 times deeper below the upper semiconductor surface than that source/drain zone. The body material is preferably provided with a more heavily doped pocket portion (120 or 280) situated along the other source/drain zone (102 or 262) normally serving as the source.

Abstract translation: 制造绝缘栅场效应晶体管（100,100V，140,150,150V，160,170,170V，180,180V，190,210,210W，220,220U，220V，220W，380或480） 以便在其源极/漏极区的一个（104或264）下方具有低破坏的垂直掺杂剂轮廓，用于减小通常用作漏极的源极/漏极区之间的pn结的寄生电容以及相邻的主体材料（108 或268）。 特别地，限定主体材料的导电类型的半导体掺杂剂的浓度在从该源极/漏极区向下移动到下面的物体 - 物质位置之前至少增加10倍，不超过上部的10倍 半导体表面比该源/漏区。 主体材料优选地设置有沿着通常用作源的另一个源极/漏极区（102或262）设置的更重掺杂的口袋部分（120或280）。

公开(公告)号：US08030151B2

公开(公告)日：2011-10-04

申请号：US12382966

申请日：2009-03-27

Applicant: Jeng-Jiun Yang ,  Constantin Bulucea

Inventor： Jeng-Jiun Yang ,  Constantin Bulucea

IPC: H01L21/8238

CPC classification number: H01L27/0623 ,  H01L21/82285 ,  H01L21/8249 ,  H01L27/0826

Abstract: A bipolar transistor (101) has a base (243) formed with an intrinsic base portion (2431), a base contact portion (245C), and a base link portion (243L) that extends between the intrinsic base portion and the base contact portion. An isolating dielectric layer (267-1 or 267-2) is provided above the base link portion. The length of the base link portion is determined, and thereby controlled, with a lateral spacing portion (269-1 or 269-2) of largely non-monocrystalline semiconductor material, preferably polycrystalline semiconductor material, provided on the dielectric layer above the base link portion. The lateral spacing portion is typically provided as part of a layer of non-monocrystalline semiconductor material used in the gate electrode of an insulated-gate field-effect transistor.

Abstract translation: 双极晶体管（101）具有形成有本征基部（2431），基部接触部（245C）和基部连接部（243L）的基部（243），该基部连接部在本征基部与基部接触部 。 隔离介质层（267-1或267-2）设置在基座连接部分上方。 确定基部连接部分的长度，从而通过设置在基底连接件上方的电介质层上的大部分非单晶半导体材料（优选多晶半导体材料）的横向间隔部分（269-1或269-2）进行控制 一部分。 横向间隔部分通常被提供作为在绝缘栅场效应晶体管的栅电极中使用的非单晶半导体材料层的一部分。

公开(公告)号：US08013390B1

公开(公告)日：2011-09-06

申请号：US12940000

申请日：2010-11-04

Applicant: Constantin Bulucea

Inventor： Constantin Bulucea

IPC: H01L27/088

CPC classification number: H01L21/823892 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/1203 ,  H01L29/1045 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/7835

Abstract: An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 220, 220U, 220V, 220W, 380, or 480) has a hypoabrupt vertical dopant profile below one (104 or 264) of its source/drain zones for reducing the parasitic capacitance along the pn junction between that source/drain zone and adjoining body material (108 or 268). In particular, the concentration of semiconductor dopant which defines the conductivity type of the body material increases by at least a factor of 10 in moving from that source/drain zone down to an underlying body-material location no more than 10 times deeper below the upper semiconductor surface than that source/drain zone. The body material preferably includes a more heavily doped pocket portion (120 or 280) situated along the other source/drain zone (102 or 262). The combination of the hypoabrupt vertical dopant profile below the first-mentioned source/drain zone, normally serving as the drain, and the pocket portion along the second-mentioned source/drain zone, normally serving as the source, enables the resultant asymmetric transistor to be especially suitable for high-speed analog applications.

Abstract translation: 绝缘栅场效应晶体管（100,100V，140,150,150V，160,170,170V，180,180V，190,210,210W，220,220U，220V，220W，380或480）具有 低于其源极/漏极区（104或264）的垂直掺杂剂分布，用于减小源极/漏极区与邻接体材料（108或268）之间的pn结的寄生电容。 特别地，限定主体材料的导电类型的半导体掺杂剂的浓度在从该源极/漏极区向下移动到下面的主体材料位置时不小于10倍深度的上方增加至少10倍 半导体表面比该源/漏区。 主体材料优选地包括沿着另一个源极/漏极区（102或262）设置的更重掺杂的凹穴部分（120或280）。 通常用作漏极的第一提及的源极/漏极区下方的低破坏垂直掺杂物分布以及通常用作源的第二次提供的源极/漏极区的凹穴部分的组合使得所得的不对称晶体管能够 特别适用于高速模拟应用。

公开(公告)号：US07968921B2

公开(公告)日：2011-06-28

申请号：US12382969

申请日：2009-03-27

Applicant: Constantin Bulucea ,  William D. French ,  Sandeep R. Bahl ,  Jeng-Jiun Yang ,  D. Courtney Parker ,  Peter B. Johnson ,  Donald M. Archer

Inventor： Constantin Bulucea ,  William D. French ,  Sandeep R. Bahl ,  Jeng-Jiun Yang ,  D. Courtney Parker ,  Peter B. Johnson ,  Donald M. Archer

IPC: H01L29/94

CPC classification number: H01L29/0847 ,  H01L21/26586 ,  H01L21/82285 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/0826 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/167 ,  H01L29/66659 ,  H01L29/7835

Abstract: An asymmetric insulated-gate field-effect transistor (100) has a source (240) and a drain (242) laterally separated by a channel zone (244) of body material (180) of a semiconductor body. A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. A more heavily doped pocket portion (250) of the body material extends largely along only the source. Each of the source and drain has a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E). The drain extension is more lightly doped than the source extension. The maximum concentration of the semiconductor dopant defining the two extensions occurs deeper in the drain extension than in the source extension. Additionally or alternatively, the drain extension extends further laterally below the gate electrode than the source extension. These features enable the threshold voltage to be highly stable with operational time.

Abstract translation: 非对称绝缘栅场效应晶体管（100）具有由半导体主体的主体材料（180）的沟道区（244）横向隔开的源极（240）和漏极（242）。 栅电极（262）覆盖沟道区上方的栅介电层（260）。 主体材料的更重掺杂的袋部分（250）主要仅沿着源极延伸。 源极和漏极中的每一个具有主要部分（240M或242M）和更轻掺杂的侧向延伸部（240E或242E）。 漏极延伸比源极延伸更轻的掺杂。 限定两个延伸的半导体掺杂剂的最大浓度在漏极延伸中比在源极延伸中更深。 另外或替代地，漏极延伸部在栅极电极之下进一步横向延伸，而不是源极延伸部分。 这些特性使得阈值电压在运行时间内稳定。