公开(公告)号：US11380622B2

公开(公告)日：2022-07-05

申请号：US16953441

申请日：2020-11-20

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Vibhor Jain ,  Sunil K. Singh ,  Johnatan A. Kantarovsky ,  Siva P. Adusumilli ,  Sebastian T. Ventrone ,  John J. Ellis-Monaghan ,  Yves T. Ngu

IPC: H01L23/544 ,  H01L23/00

Abstract: The disclosure provides a method to authenticate an integrated circuit (IC) structure. The method may include forming a first authentication film (AF) material within the IC structure. A composition of the first AF material is different from an adjacent material within the IC structure. The method includes converting the first AF material into a void within the IC structure. Additionally, the method includes creating an authentication map of the IC structure to include a location of the void in the IC structure for authentication of the IC structure.

公开(公告)号：US11374092B2

公开(公告)日：2022-06-28

申请号：US16784813

申请日：2020-02-07

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： John J. Pekarik ,  Vibhor Jain ,  Herbert Ho ,  Claude Ortolland ,  Qizhi Liu

IPC: H01L29/08 ,  H01L29/165 ,  H01L29/737 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to virtual bulk in semiconductor on insulator technology and methods of manufacture. The structure includes a heterojunction bipolar transistor formed on a semiconductor on insulator (SOI) wafer with a doped sub-collector material in a buried insulator region under a semiconductor substrate of the SOI wafer.

公开(公告)号：US11322639B2

公开(公告)日：2022-05-03

申请号：US16844606

申请日：2020-04-09

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Mark D. Levy ,  Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Vibhor Jain ,  Ramsey Hazbun ,  Pernell Dongmo ,  Cameron E. Luce ,  Steven M. Shank ,  Rajendran Krishnasamy

IPC: H01L31/107 ,  H01L31/18 ,  H01L31/028 ,  H01L31/0376

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an avalanche photodiode and methods of manufacture. The structure includes: a substrate material having a trench with sidewalls and a bottom composed of the substrate material; a first semiconductor material lining the sidewalls and the bottom of the trench; a photosensitive semiconductor material provided on the first semiconductor material; and a third semiconductor material provided on the photosensitive semiconductor material.

公开(公告)号：US11316064B2

公开(公告)日：2022-04-26

申请号：US16887375

申请日：2020-05-29

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Mark D. Levy ,  Vibhor Jain ,  Andre Sturm

IPC: H01L31/107 ,  H01L31/105 ,  H01L31/036 ,  H01L31/028 ,  H01L31/0312

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: at least one fin including substrate material, the at least one fin including sidewalls and a top surface; a trench on opposing sides of the at least one fin; a first semiconductor material lining the sidewalls and the top surface of the at least one fin, and a bottom surface of the trench; a photosensitive semiconductor material on the first semiconductor material and at least partially filling the trench; and a third semiconductor material on the photosensitive semiconductor material.

公开(公告)号：US11296190B2

公开(公告)日：2022-04-05

申请号：US16743589

申请日：2020-01-15

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Vibhor Jain ,  Anthony K. Stamper ,  Steven M. Shank ,  John J. Ellis-Monaghan ,  John J. Pekarik

IPC: H01L29/10 ,  H01L27/12 ,  H01L21/84 ,  H01L29/78 ,  H01L21/74

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to field effect transistors with back gate contact and buried high resistivity layer and methods of manufacture. The structure includes: a handle wafer comprising a single crystalline semiconductor region; an insulator layer over the single crystalline semiconductor region; a semiconductor layer over the insulator layer; a high resistivity layer in the handle wafer, separated from the insulator layer by the single crystalline semiconductor region; and a device on the semiconductor layer.

公开(公告)号：US11271077B2

公开(公告)日：2022-03-08

申请号：US16807453

申请日：2020-03-03

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  John J. Pekarik ,  Steven M. Shank ,  John J. Ellis-Monaghan

IPC: H01L27/01 ,  H01L21/76 ,  H01L29/06 ,  H01L29/04 ,  H01L21/762 ,  H01L27/102 ,  H01L29/737 ,  H01L27/12 ,  H01L21/324 ,  H01L29/32

Abstract: Structures including electrical isolation and methods of forming a structure including electrical isolation. A semiconductor layer is formed over a semiconductor substrate and shallow trench isolation regions are formed in the semiconductor layer. The semiconductor layer includes single-crystal semiconductor material having an electrical resistivity that is greater than or equal to 1000 ohm-cm. The shallow trench isolation regions are arranged to surround a portion of the semiconductor layer to define an active device region. A polycrystalline layer is positioned in the semiconductor layer and extends laterally beneath the active device region and the shallow trench isolation regions that surround the active device region.

公开(公告)号：US20220029000A1

公开(公告)日：2022-01-27

申请号：US16934669

申请日：2020-07-21

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Siva P. Adusumilli ,  Vibhor Jain ,  Steven Bentley

IPC: H01L29/66 ,  H01L29/20

Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. A layer stack is formed on a semiconductor substrate comprised of a single-crystal semiconductor material. The layer stack includes a semiconductor layer comprised of a III-V compound semiconductor material. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer extends laterally beneath the layer stack.

公开(公告)号：US11195925B2

公开(公告)日：2021-12-07

申请号：US16732755

申请日：2020-01-02

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Judson R. Holt ,  Vibhor Jain ,  Qizhi Liu ,  Ramsey Hazbun ,  Pernell Dongmo ,  John J. Pekarik ,  Cameron E. Luce

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/08 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a sub-collector region in a substrate; a collector region above the sub-collector region, the collector region composed of semiconductor material; an intrinsic base region composed of intrinsic base material surrounded by the semiconductor material above the collector region; and an emitter region above the intrinsic base region.

公开(公告)号：US11127816B2

公开(公告)日：2021-09-21

申请号：US16791214

申请日：2020-02-14

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. Adusumilli ,  Rajendran Krishnasamy ,  Steven M. Shank ,  Vibhor Jain

IPC: H01L29/08 ,  H01L29/49 ,  H01L29/16 ,  H01L29/737 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor having one or more sealed airgap and methods of manufacture. The structure includes: a subcollector region in a substrate; a collector region above the substrate; a sealed airgap formed at least partly in the collector region; a base region adjacent to the collector region; and an emitter region adjacent to the base region.

公开(公告)号：US20210217874A1

公开(公告)日：2021-07-15

申请号：US17214969

申请日：2021-03-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  Renata A. Camillo-Castillo

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06 ,  H01L29/737 ,  H01L21/762

Abstract: According to a semiconductor device herein, the device includes a substrate. An active device is formed in the substrate. The active device includes a collector region, a base region formed on the collector region, and an emitter region formed on the base region. An isolation structure is formed in the substrate around the active device. A trench filled with a compressive material is formed in the substrate and positioned laterally adjacent to the emitter region and base region. The trench extends at least partially into the collector region.