公开(公告)号：US5200348A

公开(公告)日：1993-04-06

申请号：US801865

申请日：1991-12-03

申请人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

发明人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

IPC分类号： H01L21/316 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/768 ,  H01L23/522 ,  H01L29/73

CPC分类号： H01L21/76224 ,  H01L21/76 ,  H01L21/76202 ,  H01L21/763 ,  H01L2924/0002 ,  Y10S438/981

摘要： A semiconductor device employing a new isolation process is disclosed, wherein an isolation area is a region in which a burying material is buried in a deep groove formed in a semiconductor body with a substantially constant width by anisotropic dry etching, semiconductor elements are formed in selected ones of semiconductor regions isolated by the isolation area, and others of the semiconductor regions, with no semiconductor element formed therein, have their whole surface covered with a thick oxide film which is produced by the local oxidation of the semiconductor body.The new isolation process is well-suited for a bipolar type semiconductor device, wherein the deep groove is formed so as to reach a semiconductor substrate through an N.sup.+ -type buried layer, and a thick oxide film formed simultaneously with the aforementioned thick oxide film isolates the base region and collector contact region of a bipolar transistor.

公开(公告)号：US4853343A

公开(公告)日：1989-08-01

申请号：US169748

申请日：1988-03-18

申请人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

发明人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

IPC分类号： H01L21/316 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/768 ,  H01L23/522 ,  H01L29/73

CPC分类号： H01L21/76224 ,  H01L21/76 ,  H01L21/76202 ,  H01L21/763 ,  H01L2924/0002 ,  Y10S438/981

摘要： A semiconductor device employing a new isolation process is disclosed, wherein an isolation area is a region in which a burying material is buried in a deep groove formed in a semiconductor body with a substantially constant width by anisotropic dry etching, semiconductor elements are formed in selected ones of semiconductor regions isolated by the isolation area, and others of the semiconductor regions, with no semiconductor element formed therein, have their whole surface covered with a thick oxide film which is produced by the local oxidation of the semiconductor body.The new isolation process is well-suited for a bipolar type semiconductor device, wherein the deep groove is formed so as to reach a semiconductor substrate through an N.sup.+ -type buried layer, and a thick oxide film formed simultaneously with the aforementioned thick oxide film isolates the base region and collector contact region of a bipolar transistor.

摘要翻译： 公开了一种采用新的隔离工艺的半导体器件，其中隔离区域是通过各向异性干法蚀刻将掩埋材料埋入形成在半导体主体中的宽度基本恒定的深沟槽的区域，半导体元件形成为选定的 通过隔离区域隔离的半导体区域以及其中没有形成半导体元件的其它半导体区域，其全部表面被由半导体本体的局部氧化产生的厚氧化膜覆盖。 新的隔离工艺非常适用于双极型半导体器件，其中深沟形成为通过N +型掩埋层到达半导体衬底，并且与上述厚氧化膜隔离物同时形成的厚氧化膜 双极晶体管的基极区域和集电极接触区域。

公开(公告)号：US4746963A

公开(公告)日：1988-05-24

申请号：US946778

申请日：1986-12-29

申请人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

发明人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

IPC分类号： H01L21/316 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/768 ,  H01L23/522 ,  H01L29/73 ,  H01L21/95

CPC分类号： H01L21/76224 ,  H01L21/76 ,  H01L21/76202 ,  H01L21/763 ,  H01L2924/0002 ,  Y10S438/981

摘要： A semiconductor device employing a new isolation process is disclosed, wherein an isolation area is a region in which a burying material is buried in a deep groove formed in a semiconductor body with a substantially constant width by anisotropic dry etching, semiconductor elements are formed in selected ones of semiconductor regions isolated by the isolation area, and others of the semiconductor regions, with no semiconductor element formed therein, have their whole surface covered with a thick oxide film which is produced by the local oxidation of the semiconductor body. The new isolation process is well-suited for a bipolar type semiconductor device, wherein the deep groove is formed so as to reach a semiconductor substrate through an N.sup.+ -type buried layer, and a thick oxide film formed simultaneously with the aforementioned thick oxide film isolates the base region and collector contact region of a bipolar transistor.

摘要翻译： 公开了一种采用新的隔离工艺的半导体器件，其中隔离区域是通过各向异性干法蚀刻将掩埋材料埋入形成在半导体主体中的宽度基本恒定的深沟槽的区域，半导体元件形成为选定的 通过隔离区域隔离的半导体区域以及其中没有形成半导体元件的其它半导体区域，其全部表面被由半导体本体的局部氧化产生的厚氧化膜覆盖。 新的隔离工艺非常适用于双极型半导体器件，其中深沟形成为通过N +型掩埋层到达半导体衬底，并且与上述厚氧化膜隔离物同时形成的厚氧化膜 双极晶体管的基极区域和集电极接触区域。

公开(公告)号：US4700464A

公开(公告)日：1987-10-20

申请号：US661116

申请日：1984-10-15

申请人： Daisuke Okada ,  Akihisa Uchida ,  Toshihiko Takakura ,  Shinji Nakashima ,  Nobuhiko Ohno ,  Katsumi Ogiue

发明人： Daisuke Okada ,  Akihisa Uchida ,  Toshihiko Takakura ,  Shinji Nakashima ,  Nobuhiko Ohno ,  Katsumi Ogiue

IPC分类号： H01L21/31 ,  H01L21/331 ,  H01L21/76 ,  H01L21/763 ,  H01L29/73 ,  H01L29/732 ,  H01L21/22 ,  H01L21/302

CPC分类号： H01L21/763 ,  H01L21/76 ,  Y10S438/978

摘要： A semiconductor integrated circuit device is provided with polycrystalline silicon filling U-grooves etched in a semiconductor substrate to form isolation regions which prevent any short-circuiting between the polycrystalline silicon and electrodes or wiring formed on the semiconductor substrate. A silicon dioxide film is formed within the U-grooves, and a silicon nitride film and a silicon dioxide film are further formed thereon. The silicon nitride film has a high hardness which suppresses the development of crystal defects in the peripheral active regions due to the expansion of the surface of the polycrystalline silicon when it is oxidized. When the surface of the polycrystalline silicon is oxidized, the oxidation proceeds along the oxide film over the nitride film, so that the whole of the oxide film is formed thickly. Therefore, the silicon nitride film and the silicon dioxide film are provided with an increased margin against the etching used for forming contact holes.

摘要翻译： 在半导体集成电路器件中设有在半导体衬底中蚀刻的多晶硅填充U形沟槽，以形成防止多晶硅与形成在半导体衬底上的电极之间的任何短路的隔离区域。 在U形槽内形成二氧化硅膜，在其上进一步形成氮化硅膜和二氧化硅膜。 氮化硅膜具有高硬度，其抑制了当多晶硅氧化时多晶硅的表面膨胀导致外围活性区域的晶体缺陷的发展。 当多晶硅的表面被氧化时，氧化膜沿着氮化物膜的氧化膜进行氧化，使得整个氧化膜形成得较厚。 因此，氮化硅膜和二氧化硅膜相对于用于形成接触孔的蚀刻具有增加的裕度。