公开(公告)号：US5200348A

公开(公告)日：1993-04-06

申请号：US801865

申请日：1991-12-03

申请人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

发明人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

IPC分类号： H01L21/316 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/768 ,  H01L23/522 ,  H01L29/73

CPC分类号： H01L21/76224 ,  H01L21/76 ,  H01L21/76202 ,  H01L21/763 ,  H01L2924/0002 ,  Y10S438/981

摘要： A semiconductor device employing a new isolation process is disclosed, wherein an isolation area is a region in which a burying material is buried in a deep groove formed in a semiconductor body with a substantially constant width by anisotropic dry etching, semiconductor elements are formed in selected ones of semiconductor regions isolated by the isolation area, and others of the semiconductor regions, with no semiconductor element formed therein, have their whole surface covered with a thick oxide film which is produced by the local oxidation of the semiconductor body.The new isolation process is well-suited for a bipolar type semiconductor device, wherein the deep groove is formed so as to reach a semiconductor substrate through an N.sup.+ -type buried layer, and a thick oxide film formed simultaneously with the aforementioned thick oxide film isolates the base region and collector contact region of a bipolar transistor.

公开(公告)号：US4853343A

公开(公告)日：1989-08-01

申请号：US169748

申请日：1988-03-18

申请人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

发明人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

IPC分类号： H01L21/316 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/768 ,  H01L23/522 ,  H01L29/73

CPC分类号： H01L21/76224 ,  H01L21/76 ,  H01L21/76202 ,  H01L21/763 ,  H01L2924/0002 ,  Y10S438/981

摘要： A semiconductor device employing a new isolation process is disclosed, wherein an isolation area is a region in which a burying material is buried in a deep groove formed in a semiconductor body with a substantially constant width by anisotropic dry etching, semiconductor elements are formed in selected ones of semiconductor regions isolated by the isolation area, and others of the semiconductor regions, with no semiconductor element formed therein, have their whole surface covered with a thick oxide film which is produced by the local oxidation of the semiconductor body.The new isolation process is well-suited for a bipolar type semiconductor device, wherein the deep groove is formed so as to reach a semiconductor substrate through an N.sup.+ -type buried layer, and a thick oxide film formed simultaneously with the aforementioned thick oxide film isolates the base region and collector contact region of a bipolar transistor.

摘要翻译： 公开了一种采用新的隔离工艺的半导体器件，其中隔离区域是通过各向异性干法蚀刻将掩埋材料埋入形成在半导体主体中的宽度基本恒定的深沟槽的区域，半导体元件形成为选定的 通过隔离区域隔离的半导体区域以及其中没有形成半导体元件的其它半导体区域，其全部表面被由半导体本体的局部氧化产生的厚氧化膜覆盖。 新的隔离工艺非常适用于双极型半导体器件，其中深沟形成为通过N +型掩埋层到达半导体衬底，并且与上述厚氧化膜隔离物同时形成的厚氧化膜 双极晶体管的基极区域和集电极接触区域。

公开(公告)号：US4746963A

公开(公告)日：1988-05-24

申请号：US946778

申请日：1986-12-29

申请人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

发明人： Akihisa Uchida ,  Daisuke Okada ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

IPC分类号： H01L21/316 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/768 ,  H01L23/522 ,  H01L29/73 ,  H01L21/95

CPC分类号： H01L21/76224 ,  H01L21/76 ,  H01L21/76202 ,  H01L21/763 ,  H01L2924/0002 ,  Y10S438/981

摘要： A semiconductor device employing a new isolation process is disclosed, wherein an isolation area is a region in which a burying material is buried in a deep groove formed in a semiconductor body with a substantially constant width by anisotropic dry etching, semiconductor elements are formed in selected ones of semiconductor regions isolated by the isolation area, and others of the semiconductor regions, with no semiconductor element formed therein, have their whole surface covered with a thick oxide film which is produced by the local oxidation of the semiconductor body. The new isolation process is well-suited for a bipolar type semiconductor device, wherein the deep groove is formed so as to reach a semiconductor substrate through an N.sup.+ -type buried layer, and a thick oxide film formed simultaneously with the aforementioned thick oxide film isolates the base region and collector contact region of a bipolar transistor.

摘要翻译： 公开了一种采用新的隔离工艺的半导体器件，其中隔离区域是通过各向异性干法蚀刻将掩埋材料埋入形成在半导体主体中的宽度基本恒定的深沟槽的区域，半导体元件形成为选定的 通过隔离区域隔离的半导体区域以及其中没有形成半导体元件的其它半导体区域，其全部表面被由半导体本体的局部氧化产生的厚氧化膜覆盖。 新的隔离工艺非常适用于双极型半导体器件，其中深沟形成为通过N +型掩埋层到达半导体衬底，并且与上述厚氧化膜隔离物同时形成的厚氧化膜 双极晶体管的基极区域和集电极接触区域。

公开(公告)号：US5084402A

公开(公告)日：1992-01-28

申请号：US353060

申请日：1989-05-17

申请人： Akihisa Uchida ,  Daisuke Okaka ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

发明人： Akihisa Uchida ,  Daisuke Okaka ,  Toshihiko Takakura ,  Katsumi Ogiue ,  Yoichi Tamaki ,  Masao Kawamura

IPC分类号： H01L21/316 ,  H01L21/331 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/768 ,  H01L23/522 ,  H01L29/73

CPC分类号： H01L21/76224 ,  H01L21/76 ,  H01L21/76202 ,  H01L21/763 ,  H01L2924/0002 ,  Y10S438/981

摘要： A semiconductor device employing a new isolation process is disclosed, wherein an isolation area is a region in which a burying material is buried in a deep groove formed in a semiconductor body with a substantially constant width by anisotropic dry etching, semiconductor elements are formed in selected ones of semiconductor regions isolated by the isolation area, and others of the semiconductor regions, with no semiconductor element formed therein, have their whole surface covered with a thick oxide film which is produced by the local oxidation of the semiconductor body.The new isolation process is well-suited for a bipolar type semiconductor device, wherein the deep groove is formed so as to reach a semiconductor substrate through an N.sup.+ -type buried layer, and a thick oxide film formed simultaneously with the aforementioned thick oxide film isolates the base region and collector contact region of a bipolar transistor.

公开(公告)号：US5011788A

公开(公告)日：1991-04-30

申请号：US284557

申请日：1988-12-15

申请人： Mikinori Kawaji ,  Toshihiko Takakura ,  Akihisa Uchida ,  Shigeo Kuroda ,  Yoichi Tamaki ,  Takeo Shiba ,  Kazuhiko Sagara ,  Masao Kawamura

发明人： Mikinori Kawaji ,  Toshihiko Takakura ,  Akihisa Uchida ,  Shigeo Kuroda ,  Yoichi Tamaki ,  Takeo Shiba ,  Kazuhiko Sagara ,  Masao Kawamura

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L29/732

CPC分类号： H01L21/763 ,  H01L21/76224 ,  H01L29/7325 ,  Y10S148/05

摘要： A bipolar type of semiconductor integrated circuit device is provided with U-shaped grooves which are formed by cutting a main surface of a semiconductor body to form isolation regions between bipolar transistors. A silicon oxide film can be formed in the U-shaped grooves by thermal oxidation simultaneously with the formation of a silicon oxide film used to form isolation regions between each collector contact region and base region. No separate step is needed for forming the silicon oxide film between the collector contact region and the base region. The thickness of the silicon oxide film can be controlled, and has a sufficient thickness even at its two edges, i.e., at its boundaries with the U-shaped grooves, so that the bipolar transistors exhibit good electrical characteristics. Namely, the collector resistance thereof does not increase, and the breakdown voltage at the pn junction between the collector region and the base region does not decrease. The U-shaped grooves can each comprise narrow and deep sub-grooves, with thick oxide films formed on the surfaces of the sub-grooves and a thick oxide film formed on a surface of an area between the sub-grooves, and with wiring formed on the oxide on the area between the sub-grooves.

公开(公告)号：US5141888A

公开(公告)日：1992-08-25

申请号：US642922

申请日：1991-01-18

申请人： Mikinori Kawaji ,  Toshihiko Takakura ,  Akihisa Uchida ,  Shigeo Kuroda ,  Yoichi Tamaki ,  Takeo Shiba ,  Kazuhiko Sagara ,  Masao Kawamura

发明人： Mikinori Kawaji ,  Toshihiko Takakura ,  Akihisa Uchida ,  Shigeo Kuroda ,  Yoichi Tamaki ,  Takeo Shiba ,  Kazuhiko Sagara ,  Masao Kawamura

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L29/732

CPC分类号： H01L21/763 ,  H01L21/76224 ,  H01L29/7325 ,  Y10S148/05

摘要： A bipolar type of semiconductor integrated circuit device is provided with U-shaped grooves which are formed by cutting a main surface of a semiconductor body to form isolation regions between bipolar transistors. A silicon oxide film can be formed in the U-shaped grooves by thermal oxidation simultaneously with the formation of a silicon oxide film used to form isolation regions between each collector contact region and base region. No separate step is needed for forming the silicon oxide film between the collector contact region and the base region. The thickness of the silicon oxide film can be controlled, and has a sufficient thickness even at its two edges, i.e., at its boundaries with the U-shaped grooves, so that the bipolar transistors exhibit good electrical characteristics. Namely, the collector resistance thereof does not increase, and the breakdown voltage at the pn junction between the collector region and the base region does not decrease. The U-shaped grooves can each comprise narrow and deep sub-grooves, with thick oxide films formed on the surfaces of the sub-grooves and a thick oxide film formed on a surface of an area between the sub-grooves, and with wiring formed on the oxide on the area between the sub-grooves.

公开(公告)号：US4819054A

公开(公告)日：1989-04-04

申请号：US11932

申请日：1987-02-06

申请人： Mikinori Kawaji ,  Toshihiko Takakura ,  Akihisa Uchida ,  Shigeo Kuroda ,  Yoichi Tamaki ,  Takeo Shiba ,  Kazuhiko Sagara ,  Masao Kawamura

发明人： Mikinori Kawaji ,  Toshihiko Takakura ,  Akihisa Uchida ,  Shigeo Kuroda ,  Yoichi Tamaki ,  Takeo Shiba ,  Kazuhiko Sagara ,  Masao Kawamura

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L29/732 ,  H01L27/12

CPC分类号： H01L21/763 ,  H01L21/76224 ,  H01L29/7325 ,  Y10S148/05

摘要： A bipolar type of semiconductor integrated circuit device is provided with U-shaped grooves which are formed by cutting a main surface of a semiconductor body to form isolation regions between bipolar transistors. A silicon oxide film can be formed in the U-shaped grooves by thermal oxidation simultaneously with the formation of a silicon oxide film used to form isolation regions between each collector contact region and base region. No separate step is needed for forming the silicon oxide film between the collector contact region and the base region. The thickness of the silicon oxide film can be controlled, and has a sufficient thickness even at its two edges, i.e., at its boundaries with the U-shaped grooves, so that the bipolar transistors exhibit good electrical characteristics. Namely, the collector resistance thereof does not increase, and the breakdown voltage at the pn junction between the collector region and the base region does not decrease. The U-shaped grooves can each comprise narrow and deep sub-grooves, with thick oxide films formed on the surfaces of the sub-grooves and a thick oxide film formed on a surface of an area between the sub-grooves, and with wiring formed on the oxide on the area between the sub-grooves.

摘要翻译： 双极型半导体集成电路器件设置有通过切割半导体本体的主表面以在双极晶体管之间形成隔离区而形成的U形沟槽。 可以通过热氧化在U形槽中形成氧化硅膜，同时形成用于在每个集电极接触区域和基极区域之间形成隔离区域的氧化硅膜。 在集电极接触区域和基极区域之间形成氧化硅膜不需要单独的步骤。 可以控制氧化硅膜的厚度，并且即使在其两个边缘，即与U形槽的边界处，也具有足够的厚度，使得双极晶体管表现出良好的电特性。 也就是说，其集电极电阻不增加，并且集电极区域和基极区域之间的pn结处的击穿电压不降低。 U形槽可以各自包括窄的和深的子槽，其中形成在子槽的表面上的厚的氧化膜和形成在子槽之间的区域的表面上的厚氧化膜，并且形成有布线 在子槽之间的区域上的氧化物上。

公开(公告)号：US20100066998A1

公开(公告)日：2010-03-18

申请号：US12595699

申请日：2008-04-25

申请人： Yoshinori Hayashi ,  Masao Kawamura ,  Hideki Mori

发明人： Yoshinori Hayashi ,  Masao Kawamura ,  Hideki Mori

IPC分类号： G01N21/00

CPC分类号： G01N21/9503

摘要： [Problem] To provide a surface inspection apparatus able to suitably inspect the outer circumference edge part of a semiconductor wafer or other plate-shaped member.[Technical Solution] A semiconductor wafer inspection apparatus 10 has a camera lens 22 arranged facing an outer circumference edge part 101 of a semiconductor wafer 100, an imaging surface 24 arranged facing an outer circumference end face of a semiconductor wafer 100 via the camera lens 22, a mirror 12 forming an image of a first outer circumference bevel surface 101b of the semiconductor wafer 100 on the imaging surface 24 via the camera lens 22, a mirror 14 forming an image of a second outer circumference bevel surface 101c of the semiconductor wafer 100 on the imaging surface 24 via the camera lens 22, a correction lens 26 forming an image of an outer circumference end face 101a of the semiconductor wafer 100 on the imaging surface 24 via the center part of the camera lens 22, and an illumination light guide lamp part 18 illuminating surfaces so that, compared with the outer circumference end face 101a, the first outer circumference bevel surface 101b and second outer circumference bevel surface 101c become brighter.

摘要翻译： [问题]提供一种能够适当地检查半导体晶片或其他板状部件的外周缘部的表面检查装置。 技术方案半导体晶片检查装置10具有面向半导体晶片100的外周缘部101配置的摄像透镜22，经由照相机镜头22配置成与半导体晶片100的外周端面相对配置的摄像面24 ，通过照相机镜头22在成像面24上形成半导体晶片100的第一外周斜面101b的图像的反射镜12，形成半导体晶片100的第二外周斜面101c的图像的反射镜 通过照相机镜头22在成像表面24上，通过照相机镜头22的中心部分在成像表面24上形成半导体晶片100的外周端面101a的图像的校正透镜26和照明光导 灯部18照射表面，使得与外周端面101a相比，第一外周斜面101b和第二外圆周面 斜面101c变得更亮。

公开(公告)号：US20090251294A1

公开(公告)日：2009-10-08

申请号：US12295564

申请日：2007-03-30

申请人： Masao Kawamura ,  Kou Takesaki ,  Kentaro Yamasaki

发明人： Masao Kawamura ,  Kou Takesaki ,  Kentaro Yamasaki

IPC分类号： H04Q5/22

CPC分类号： G06Q10/087

摘要： As an assembly 50 of articles of management targets, a serial number that becomes a consecutive number is recorded in each of RFID tags 1, 2, . . . , 12 attended to cardboard boxes 31, 32, . . . , 42 in which articles are stored and a flag, by which the total number of articles that becomes a management target of articles can be calculated, is recorded in at least one of RFID tags. For example, the serial numbers are consecutive numbers starting from one, and the total number of articles is recorded in the flags of all of the RFID tags, or an end flag indicating the last is recorded in the flag of the last RFID tag. The serial numbers are consecutive numbers starting an arbitrary number, a start flag indicating the first is recorded in the flag of the first RFID tag and an end flag indicating the last is recorded in the flag of the last RFID tag, or the total number is recorded in the flag of the last RFID tag.

摘要翻译： 作为管理目标的组件50，在每个RFID标签1,2中记录成为连续数的序列号。 。 。 ，12人出席了纸箱31,32。 。 。 42，其中存储有物品，并且可以计算成为物品的管理目标物品的总数的标志，记录在至少一个RFID标签中。 例如，序列号是从1开始的连续数字，并且总数量记录在所有RFID标签的标志中，或者表示最后的标签的结束标记记录在最后的RFID标签的标志中。 序列号是从任意数字开始的连续数字，表示第一个的起始标志记录在第一RFID标签的标志中，表示最后一个的结束标志记录在最后一个RFID标签的标志中，或者总数是 记录在最后一个RFID标签的旗帜上。

公开(公告)号：US4943655A

公开(公告)日：1990-07-24

申请号：US328388

申请日：1989-03-24

申请人： Kunioki Kato ,  Masao Kawamura ,  Hiroshi Goda ,  Kiyoshi Sawada ,  Kazuhiro Hamatani

发明人： Kunioki Kato ,  Masao Kawamura ,  Hiroshi Goda ,  Kiyoshi Sawada ,  Kazuhiro Hamatani

IPC分类号： C07C20060101 ,  C07C309/30 ,  C07C311/15

CPC分类号： C07C309/00

摘要： Process for preparing 2-alkyl-5-haloacetylbenzenesulfonamide represented by the general formula (1), ##STR1## (wherein R.sup.1 is an alkyl group having 1 to 5 carbon atoms; and X is a chlorine atom, bromine atom or iodine atom), characterized by halogenating a 5-acetyl-2-alkylbenzenesulfonamide represented by the general formula (2), ##STR2## (wherein R.sup.1 is the same as defined above) in a lower alcohol represented by the general formula (3),R.sup.4 --OH(wherein R.sup.4 is an alkyl group having 1 to 5 carbon atoms).