公开(公告)号：US11635906B2

公开(公告)日：2023-04-25

申请号：US16984429

申请日：2020-08-04

Applicant: Micron Technology, Inc.

Inventor： Mark A. Helm ,  Joseph T. Pawlowski

IPC: G06F3/06 ,  G11C11/41 ,  G11C16/04

Abstract: The present disclosure includes apparatuses and methods for acceleration of data queries in memory. An example apparatus includes an array of memory cells and processing circuitry. The processing circuitry is configured to receive, from a host, a query for particular data in the array of memory cells, wherein the particular data corresponds to a search key generated by the host, search portions of the array of memory cells for the particular data corresponding to the search key generated by the host, search portions of the array of memory cells for the particular data corresponding to the search key, determine data stored in the portions of the array of memory cells that corresponds more closely to the search key than other data stored in the portions of the array of memory cells, and transfer the data that corresponds more closely to the search key than the other data to the host.

公开(公告)号：US11385819B2

公开(公告)日：2022-07-12

申请号：US16995682

申请日：2020-08-17

Applicant: Micron Technology, Inc.

Inventor： Kishore K. Muchherla ,  Niccolo' Righetti ,  Jeffrey S. McNeil, Jr. ,  Akira Goda ,  Todd A. Marquart ,  Mark A. Helm ,  Gil Golov ,  Jeremy Binfet ,  Carmine Miccoli ,  Giuseppina Puzzilli

IPC: G06F3/06

Abstract: A system includes a processing device and trigger circuitry to signal the processing device responsive, at least in part, based on a determination that a trigger event has occurred. The system can further include a memory device communicatively coupled to the processing device. The memory device can include a cyclic buffer partition portion having a first endurance characteristic and a first reliability characteristic associated therewith. The memory device can further include a snapshot partition portion coupled to the cyclic buffer partition portion via hold-up capacitors. The snapshot partition portion can have a second endurance characteristic and a second reliability characteristic associated therewith. The processing device can perform operations including writing received data sequentially to the cyclic buffer partition portion and writing, based at least in part on the determination that the trigger event has occurred, data from the cyclic buffer partition portion to the snapshot partition portion.

公开(公告)号：US20220215885A1

公开(公告)日：2022-07-07

申请号：US17704687

申请日：2022-03-25

Applicant: Micron Technology, Inc.

Inventor： Mark A. Helm ,  Joseph T. Pawlowski

IPC: G11C16/12 ,  G11C16/24 ,  G11C7/10

Abstract: The present disclosure includes apparatuses and methods for acceleration of data queries in memory. A number of embodiments include an array of memory cells, and processing circuitry configured to receive, from a host, a query for particular data stored in the array of memory cells, wherein the particular data corresponds to a search key generated by the host, search portions of the array of memory cells for the particular data corresponding to the search key, determine data stored in the portions of the array of memory cells that matches the search key, and transfer the data that matches the search key to the host.

公开(公告)号：US20220197771A1

公开(公告)日：2022-06-23

申请号：US17691957

申请日：2022-03-10

Applicant: Micron Technology, Inc.

Inventor： Jeffrey S. McNeil, JR. ,  Niccolo' Righetti ,  Kishore K. Muchherla ,  Akira Goda ,  Todd A. Marquart ,  Mark A. Helm ,  Gil Golov ,  Jeremy Binfet ,  Carmine Miccoli ,  Giuseppina Puzzilli

IPC: G06F11/30 ,  G06F11/07 ,  G06F1/30 ,  G11C5/14 ,  G11C16/34

Abstract: A method includes writing received data sequentially to a particular location of a cyclic buffer of a memory device according to a first set of threshold voltage distributions. The method further includes performing a touch up operation on the particular location by adjusting the first set of threshold voltage distributions of the data to a second set of threshold voltage distributions in response to a determination that a trigger event has occurred. The second set of threshold voltage distributions can have a larger read window between adjacent threshold voltage distributions of the second set than that of the first set of threshold voltage distributions.

公开(公告)号：US20220188247A1

公开(公告)日：2022-06-16

申请号：US17117933

申请日：2020-12-10

Applicant: Micron Technology, Inc.

Inventor： Chulbum Kim ,  Mark A. Helm ,  Yoav Weinberg

IPC: G06F13/16 ,  G06F1/26

Abstract: Methods, systems, and devices for status check using chip enable pin are described. An apparatus may include a memory device, a pin coupled with the memory device, and a driver coupled with the pin and configured to bias the pin to a first a voltage or a second voltage based on a status of the memory device. The status may indicate, for example, whether the memory device is available to receive a command. The driver may bias the pin to a first voltage based on a first status of the memory device indicating that the memory device is busy. Additionally, or alternatively, the driver may bias the pin to a second voltage based on a second status of the memory device indicating that the memory device is available to receive the command. In some cases, the pin may be an example of a chip enable pin.

公开(公告)号：US11301346B2

公开(公告)日：2022-04-12

申请号：US17005114

申请日：2020-08-27

Applicant: Micron Technology, Inc.

Inventor： Todd A. Marquart ,  Niccolo′ Righetti ,  Jeffrey S. McNeil, Jr. ,  Akira Goda ,  Kishore K. Muchherla ,  Mark A. Helm ,  Gil Golov ,  Jeremy Binfet ,  Carmine Miccoli ,  Giuseppina Puzzilli

IPC: G06F11/00 ,  G06F11/30 ,  G06F11/14 ,  G06F11/32 ,  G06F1/30 ,  G06F11/07

Abstract: A system includes a processing device and a memory device coupled to the processing device. The memory device can include a cyclic buffer portion and a snapshot portion. The processing device can store time based telemetric sensor data in the cyclic buffer portion, copy an amount of the telemetric sensor data from the cyclic buffer portion to the snapshot portion in response to a trigger event, operate the cyclic buffer portion with a first trim tailored to a performance target of the cyclic buffer portion, and operate the snapshot portion with a second trim tailored to a performance target of the snapshot portion.

公开(公告)号：US11289166B2

公开(公告)日：2022-03-29

申请号：US16984452

申请日：2020-08-04

Applicant: Micron Technology, Inc.

Inventor： Mark A. Helm ,  Joseph T. Pawlowski

IPC: G11C16/06 ,  G11C16/12 ,  G11C16/24 ,  G11C7/10

Abstract: The present disclosure includes apparatuses and methods for acceleration of data queries in memory. A number of embodiments include an array of memory cells, and processing circuitry configured to receive, from a host, a query for particular data stored in the array of memory cells, wherein the particular data corresponds to a search key generated by the host, search portions of the array of memory cells for the particular data corresponding to the search key, determine data stored in the portions of the array of memory cells that matches the search key, and transfer the data that matches the search key to the host.

公开(公告)号：US20220066898A1

公开(公告)日：2022-03-03

申请号：US17005114

申请日：2020-08-27

Applicant: Micron Technology, Inc.

Inventor： Todd A. Marquart ,  Niccolo' Righetti ,  Jeffrey S. McNeil, JR. ,  Akira Goda ,  Kishore K. Muchherla ,  Mark A. Helm ,  Gil Golov ,  Jeremy Binfet ,  Carmine Miccoli ,  Giuseppina Puzzilli

IPC: G06F11/30 ,  G06F11/14 ,  G06F11/07 ,  G06F11/32 ,  G06F1/30

Abstract: A system includes a processing device and a memory device coupled to the processing device. The memory device can include a cyclic buffer portion and a snapshot portion. The processing device can store time based telemetric sensor data in the cyclic buffer portion, copy an amount of the telemetric sensor data from the cyclic buffer portion to the snapshot portion in response to a trigger event, operate the cyclic buffer portion with a first trim tailored to a performance target of the cyclic buffer portion, and operate the snapshot portion with a second trim tailored to a performance target of the snapshot portion.

公开(公告)号：US11183247B2

公开(公告)日：2021-11-23

申请号：US16546417

申请日：2019-08-21

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Mark A. Helm ,  Kalyan C. Kavalipurapu

IPC: G11C16/10 ,  G11C16/34 ,  G11C11/56 ,  G11C16/04

Abstract: Methods of operating a memory include boosting a channel voltage of a memory cell selected for programming to a particular voltage level for a particular programming pulse, boosting the channel voltage of the memory cell selected for programming to a second voltage level, greater than the particular voltage level, for a subsequent programming pulse, and boosting the channel voltage of the memory cell selected for programming to a third voltage level, greater than the second voltage level, for a next subsequent programming pulse.

公开(公告)号：US10431310B2

公开(公告)日：2019-10-01

申请号：US15928856

申请日：2018-03-22

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Mark A. Helm ,  Kalyan C. Kavalipurapu

IPC: G11C16/10 ,  G11C16/34 ,  G11C11/56 ,  G11C16/04

Abstract: Methods of operating a memory include boosting a channel voltage of a memory cell selected for programming to a particular voltage level for a particular programming pulse, boosting the channel voltage of the memory cell selected for programming to a second voltage level, greater than the particular voltage level, for a subsequent programming pulse, and boosting the channel voltage of the memory cell selected for programming to a third voltage level, greater than the second voltage level, for a next subsequent programming pulse.