Power switch circuit for single power supply
    72.
    发明授权
    Power switch circuit for single power supply 失效
    单电源电源开关电路

    公开(公告)号:US08248147B2

    公开(公告)日:2012-08-21

    申请号:US12838485

    申请日:2010-07-18

    IPC分类号: H03K17/687

    CPC分类号: H02M3/156

    摘要: A power switch circuit providing voltage to an output port is provided. The switch circuit includes a single power supply, a switch unit, a controlling unit, and a logic unit. The switch unit is connected between the single power supply and an output port and capable of being turned on and off alternatively for continuing or discontinuing power from the single power supply to the output port; the single power supply provides power to the output port. The controlling unit is configured for generating a voltage controlling signal and transmitting the voltage controlling signal to the logic unit. The logic unit receives and inverts the voltage controlling signal, and outputs the inverted voltage controlling signal to turn on or turn off the switch unit.

    摘要翻译: 提供向输出端口提供电压的电源开关电路。 开关电路包括单个电源,开关单元,控制单元和逻辑单元。 开关单元连接在单个电源和输出端口之间,并且能够交替地被接通和断开,用于从单个电源向输出端口继续或停止电力; 单个电源为输出端口提供电源。 控制单元被配置为产生电压控制信号并将电压控制信号传送到逻辑单元。 逻辑单元接收和反相电压控制信号,并输出反相电压控制信号以接通或关断开关单元。

    Apparatus and method to store original point-in-time data
    74.
    发明授权
    Apparatus and method to store original point-in-time data 有权
    用于存储原始时间点数据的装置和方法

    公开(公告)号:US08055868B2

    公开(公告)日:2011-11-08

    申请号:US12182059

    申请日:2008-07-29

    IPC分类号: G06F12/00

    摘要: A method to store point-in-time data, comprising establishing a block size, providing source data storage comprising (S) blocks, and target data storage comprising (T) blocks. The method configures (B) source storage segments and (B) target storage segments, and receives updated point-in-time data for original point-in-time data written to an (i)th source storage segment. The method then determines if a (j)th target storage segment comprises available storage capacity to store the original point-in-time data. If a (j)th target storage segment comprises available storage capacity to store the original point-in-time data, the method writes the original point-in-time data to that (j)th target storage segment.

    摘要翻译: 一种存储时间点数据的方法,包括建立块大小,提供包括(S)块的源数据存储器和包括(T)块的目标数据存储器。 该方法配置(B)源存储段和(B)目标存储段,并且接收更新的写入第(i)个源存储段的原始时间点数据。 该方法然后确定第(j)目标存储段是否包括存储原始时间点数据的可用存储容量。 如果第(j)目标存储段包括存储原始时间点数据的可用存储容量,则该方法将原始时间点数据写入到第(j)个目标存储段。

    DYNAMICALLY ADJUSTING WRITE CACHE SIZE
    76.
    发明申请
    DYNAMICALLY ADJUSTING WRITE CACHE SIZE 审中-公开
    动态调整写入缓存大小

    公开(公告)号:US20100049920A1

    公开(公告)日:2010-02-25

    申请号:US12194614

    申请日:2008-08-20

    IPC分类号: G06F12/08

    摘要: A storage system includes a backend storage unit for storing electronic information; a controller unit for controlling reading and writing to the backend storage unit; and at least one of a cache and a non-volatile storage for storing the electronic information during at least one of the reading and the writing; the controller unit executing machine readable and machine executable instructions including instructions for: testing if a frequency of non-volatile storage full condition has occurred one of above and below an upper threshold frequency value and a lower threshold frequency value; if the frequency of the condition has exceeded a threshold frequency value, then calculating a new size; calculating an expected average response time for the new size; comparing actual response time to the expected response time; and one of adjusting and not adjusting a size of the non-volatile storage to minimize the response time.

    摘要翻译: 存储系统包括用于存储电子信息的后端存储单元; 用于控制对后端存储单元的读取和写入的控制器单元; 以及缓存和非易失性存储器中的至少一个,用于在读取和写入中的至少一个期间存储电子信息; 所述控制器单元执行机器可读和机器可执行指令,其包括用于:测试非易失性存储满状态的频率是否发生在上阈值频率值和较低阈值频率值之上和之下的一个; 如果条件的频率超过阈值频率值,则计算新的大小; 计算新尺寸的预期平均响应时间; 将实际响应时间与预期响应时间进行比较; 以及调整并且不调整非易失性存储器的尺寸之一以最小化响应时间。

    Expression System, Components Thereof and Methods of Use
    79.
    发明申请
    Expression System, Components Thereof and Methods of Use 有权
    表达系统及其组件及其使用方法

    公开(公告)号:US20080311618A1

    公开(公告)日:2008-12-18

    申请号:US11575621

    申请日:2005-10-03

    IPC分类号: C12N15/11 C07K14/00 C12N5/10

    CPC分类号: C07K14/21

    摘要: Recently, the development of inducible expression systems has involved exploitation of the p-cym operon from Pseudomonas putido. Disclosed herein are novel expression systems and components thereof, which involve the development of CymR variants with reverse DNA binding activity, such that they exhibit increased affinity for DNA in a presence rather than an absence of an effector molecule such as cumene or an equivalent thereof. Also disclosed are the CymR variants, fusion proteins incorporating such variants, and their use in the control and expression of polynucleotides.

    摘要翻译: 最近,诱导型表达系统的发展涉及从假单胞菌(Pseudomonas putido)中开发p-cym操纵子。 本文公开了新的表达系统及其组分,其涉及开发具有反向DNA结合活性的CymR变体,使得它们在存在而不是不存在效应分子例如枯烯或其等同物时表现出对DNA的增加的亲和力。 还公开了CymR变体,掺入这些变体的融合蛋白及其在多核苷酸的控制和表达中的用途。