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公开(公告)号：US20050008187A1
公开(公告)日：2005-01-13
申请号：US10857771
申请日：2004-05-28
申请人： Shin Ito , Shinichi Yamashita
发明人： Shin Ito , Shinichi Yamashita
CPC分类号： H04R1/2888 , H04R2209/027
摘要： Side plates, constituting side surfaces of a speaker cabinet, each comprise a base member having a plurality of grooves formed in its outer surface (obverse surface) region at predetermined intervals, and a decorative plate adhesively bonded to the outer surface of the base member, in a laminated fashion, so as to cover the grooves. The laminated base member and decorative plate are pressed and curved, via upper and lower molds, so as to provide a smooth, convexlycurved outer surface. The grooves are adhesively bonded along their opening edges to the inner surface of the decorative plate, so that the opening edges of each of the grooves will not move toward or away from each other when external force is applied to the side plate.
摘要翻译： 构成扬声器箱体的侧面的侧板各自包括：基部构件，其具有在其外表面（正面）区域中以预定间隔形成的多个槽;以及装饰板，其粘合到所述基座构件的外表面， 以层叠的方式，以覆盖凹槽。 层叠基材和装饰板通过上模和下模被压制和弯曲，以提供平滑的凸起的外表面。 凹槽沿其开口边缘粘合到装饰板的内表面上，使得当外力施加到侧板时，每个凹槽的开口边缘将不会相互朝向或远离移动。
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公开(公告)号：US5903316A
公开(公告)日：1999-05-11
申请号：US703580
申请日：1996-08-27
CPC分类号： H04N5/202
摘要： According to an information signal correction processing apparatus of the invention which includes a plurality of clip circuits, a knee circuit, an adder, and a controller, an information signal which has been obtained through the clip circuits by clipping an input information signal in accordance with a plurality of clipping characteristics which have been arbitrarily set and an information signal which has been obtained through the knee circuit by voltage dividing the input information signal in accordance with a voltage dividing ratio which has been arbitrarily set are added by the adder and, when the resultant signal is outputted, the plurality of clipping characteristics and the voltage dividing ratio are respectively controlled by the controller, so that the information signal can be processed without being deteriorated.
摘要翻译： 根据本发明的信息信号校正处理装置，其包括多个限幅电路，膝盖电路，加法器和控制器，通过剪辑电路通过限幅输入信息信号获得的信息信号，根据 通过加法器对任意设定的多个限幅特性和根据任意设定的分压比通过对输入信息信号进行分压而得到的信息信号相加， 输出合成信号，控制器分别控制多个限幅特性和分压比，使得可以处理信息信号而不劣化。
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73.发明授权Data reproducing apparatus having equalization characteristics which can be controlled 失效具有能够被控制的均衡特性的数据再生装置
公开(公告)号：US5887030A
公开(公告)日：1999-03-23
申请号：US574350
申请日：1995-12-18
CPC分类号： H03L7/0805 , G11B20/10009 , G11B20/1403 , H03L7/0807 , H03L7/099 , H04L25/03885
摘要： A reproducing apparatus includes an equalizer for equalizing reproduced data, a clock generating circuit for generating a clock synchronized with the reproduced data, and a phase difference detector for detecting a phase difference between the reproduced data equalized by the equalizer and the clock. The clock generating circuit receives an output from the phase difference detector as a control signal, and generates a clock of frequency according to the output from the phase difference detector. The equalization characteristic of the equalizer is controlled by the control signal of the clock generating circuit. With this arrangement, it is possible to generate a clock which follows a variation in the frequency of the reproduced data, and it is also possible to realize an optimum equalization characteristic according to the variation in the frequency of the reproduced data.
摘要翻译： 再现装置包括用于均衡再现数据的均衡器，用于产生与再现数据同步的时钟的时钟产生电路，以及用于检测由均衡器和时钟均衡的再现数据之间的相位差的相位差检测器。 时钟产生电路接收来自相位差检测器的输出作为控制信号，并根据相位差检测器的输出产生频率时钟。 均衡器的均衡特性由时钟发生电路的控制信号控制。 利用这种布置，可以产生跟随再现数据的频率变化的时钟，并且还可以根据再现数据的频率的变化来实现最佳的均衡特性。
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74.发明授权
公开(公告)号：US5793547A
公开(公告)日：1998-08-11
申请号：US218703
申请日：1994-03-28
CPC分类号： G11B20/18
摘要： An information signal reproducing apparatus capable of correcting digital an information signal utilizing correction data, is formed from a reference signal contained in an information signal reproduced from a recording medium, in which the correction of the digital information signal is conducted behind a digital signal processor for processing the digital information signal corresponding to the reproduced information signal, so that the number of bits handled by the digital signal processor is minimized and the circuit magnitude of the digital signal processor is reduced.
摘要翻译： 能够利用校正数据对信息信号进行数字化的信息信号再现装置由包含在从记录介质再现的信息信号中的参考信号形成，其中数字信息信号的校正在数字信号处理器之后进行， 处理与再现的信息信号对应的数字信息信号，使得由数字信号处理器处理的位数最小化，并减小数字信号处理器的电路幅值。
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75.发明授权Multichannel digital-signal reproducing apparatus for switching access timing relative to reproducing timing 失效用于相对于再现定时切换访问定时的多通道数字信号再现装置
公开(公告)号：US5555230A
公开(公告)日：1996-09-10
申请号：US475838
申请日：1995-06-07
IPC分类号： G11B15/467 , G11B20/10 , G11B20/12 , G11B20/18 , G11B27/30 , H04N5/7826 , H04N9/797 , H04N9/877 , H04N9/888
CPC分类号： H04N5/78266 , G11B15/4678 , G11B20/10 , G11B20/10527 , G11B20/1833 , G11B27/3009 , G11B27/3027 , H04N9/7973 , H04N9/877 , H04N9/888 , G11B20/1208 , G11B2020/10592 , G11B2220/90
摘要： An apparatus for reproducing digital information from a recording medium having a plurality of parallel tracks and digital information recorded thereon as n-channel (n being an integer greater than or equal to 2) digital signals. The n-channel digital signals are reproduced by n-reproducing heads. The digital information contained in the reproduced signals is stored in a storage device. Discriminating data is obtained for determining which of the n-channel digital signals reproduced correspond to the reproducing heads. The timing of an access device, accessing the storage device for performing a predetermined processing of the digital signals stored in the storage device relative to the reproducing timing of the digital information reproduced by the n reproducing heads, is controlled in accordance with the discrimination data.
摘要翻译： 一种用于从具有多个并行轨道和其上记录的数字信息的记录介质再现数字信息的装置，其中n信道（n是大于或等于2的整数）数字信号。 n路数字信号由n个再现头再现。 包含在再现信号中的数字信息被存储在存储装置中。 获得鉴别数据，用于确定所再现的n路数字信号中的哪一个对应于再现头。 根据鉴别数据控制存取装置的访问存储装置，用于对存储在存储装置中的数字信号进行预定处理，相对于由n个再现头再现的数字信息的再现定时。
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76.发明授权
公开(公告)号：US5481518A
公开(公告)日：1996-01-02
申请号：US307047
申请日：1994-09-16
IPC分类号： G11B15/467 , G11B20/10 , G11B20/12 , G11B20/18 , G11B27/30 , H04N5/7826 , H04N9/797 , H04N9/877 , H04N9/888
CPC分类号： H04N5/78266 , G11B15/4678 , G11B20/10 , G11B20/10527 , G11B20/1833 , G11B27/3009 , G11B27/3027 , H04N9/7973 , H04N9/877 , H04N9/888 , G11B20/1208 , G11B2020/10592 , G11B2220/90
摘要： An apparatus for reproducing digital information from a recording medium having a plurality of parallel tracks and digital information recorded thereon as n-channel (n being an integer greater than or equal to 2) digital signals. The n-channel digital signals are reproduced by n-reproducing heads. The digital information contained in the reproduced signals is stored in a storage device. Discriminating data is obtained for determining which of the n-channel digital signals reproduced correspond to the reproducing heads. The timing of an access device, accessing the storage device for performing a predetermined processing of the digital signals stored in the storage device relative to the reproducing timing of the digital information reproduced by the n reproducing heads, is controlled in accordance with the discrimination data.
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77.发明授权Video signal processing apparatus having series connected timing control circuits 失效具有串联连接定时控制电路的视频信号处理装置
公开(公告)号：US5400148A
公开(公告)日：1995-03-21
申请号：US273629
申请日：1994-07-12
IPC分类号： H04N9/804 , H04N5/7824 , H04N5/95 , H04N9/80 , H04N9/808 , H04N9/83 , H04N9/89 , H04N5/76 , H04N9/79
CPC分类号： H04N9/831 , H04N5/7824
摘要： A video signal processing apparatus for processing a video signal includes a plurality of series-connected signal processing circuits. A plurality of timing control circuits for respectively controlling the plurality of signal processing circuits in accordance with a reference signal are provided. At least one of the plurality of timing control circuits inputs a timing signal conforming to the reference signal, and delays the passage of the timing signal therethrough by a time interval corresponding to a delay time of the video signal generated by the corresponding signal processing circuit and outputs a delayed timing signal. Consequently, it is possible to minimize a change in the timing control circuits, that is, a change in the overall apparatus, caused by the partial change in the design of the signal processing circuits.
摘要翻译： 用于处理视频信号的视频信号处理装置包括多个串联连接的信号处理电路。 提供了用于分别根据参考信号控制多个信号处理电路的多个定时控制电路。 所述多个定时控制电路中的至少一个输入符合所述参考信号的定时信号，并且延迟所述定时信号通过其相应于由所述相应信号处理电路产生的视频信号的延迟时间的时间间隔，以及 输出延迟定时信号。 因此，可以最小化定时控制电路的变化，即由信号处理电路的设计的部分变化引起的整个装置的变化。
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公开(公告)号：US5303245A
公开(公告)日：1994-04-12
申请号：US666608
申请日：1991-03-08
CPC分类号： H03M13/09
摘要： In an information signal processing arrangement, an information signal, to which an error detecting code has been added and a part of which other than the error detecting code has been set to a code indicating a predetermined value, is received. Error detection capability is increased by detecting an error in the information signal according to the error detecting code added to the received information signal, and detecting whether or not the part of the information signal set to the predetermined value has changed.
摘要翻译： 在信息信号处理装置中，接收已经添加了检错码的信息信号和除了检错码以外的其中一部分的信息信号已被设置成表示预定值的码。 通过根据添加到接收到的信息信号中的检错码检测信息信号中的错误，并检测设定为预定值的信息信号的部分是否已经改变来增加错误检测能力。
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79.发明授权Information signal recording apparatus recording pilot signals for tracking control 失效信息信号记录装置记录用于跟踪控制的导频信号
公开(公告)号：US5124853A
公开(公告)日：1992-06-23
申请号：US600143
申请日：1990-10-17
IPC分类号： G11B5/592 , G11B15/467
CPC分类号： G11B15/4678 , G11B5/5922 , G11B5/00865
摘要： In an information signal recording apparatus having an m (m.gtoreq.2) number of heads arranged to record, in many parallel tracks on a recording medium, information signals of the m number of channels by simultaneously tracing the surface of the medium while simultaneously forming thereby the m number of tracks, pilot signals of an n number of kinds are recorded in rotation along with the information signals of the m number of channels in such a way as to recur in a cycle of an (n.times.m) number of tracks.
摘要翻译： 在具有m（m> / = 2）个头的信息信号记录装置中，其布置成在记录介质上的多个并行轨道中记录m个通道的信息信号，同时同时跟踪介质的表面 由此形成m个磁道，n个类型的导频信号与m个信道数的信息信号一起被旋转地记录，以便以（n×m）个磁道的周期再现。
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80.发明授权Method and apparatus for coating shear-staked peripheral portions of coated shell 失效用于涂覆涂层外壳的剪切周边部分的方法和装置
公开(公告)号：US4976998A
公开(公告)日：1990-12-11
申请号：US321738
申请日：1989-03-10
IPC分类号： B05C3/10 , B05C3/20 , B05D1/18 , B05D7/00 , B60T13/567
CPC分类号： B60T13/567 , B05C3/20 , B05D1/18 , B05D1/002
摘要： A method and apparatus for providing to an anti-rust treatment a peripheral portion a shell such as is associated with a brake booster and which comprises a pair of cylindrical members disposed in abutting relationship with each other and fastened together by a staking operation which occurs by applying a shearing action to the periphery of the abutting members at a plurality of locations. The substantially cylindrical shell is held at an angle with respect to the horizontal, and then driven for rotation. A vehicle containing an anti-rust paint is disposed below the rotating shell, and the shell is positioned so that its axis of rotation does not intersect the vessel. As the shell rotates, the shear-staked peripheral portion of the shell is successively brought into dipping relationship with the paint.
摘要翻译： 一种用于对周边部分进行防锈处理的方法和装置，所述外壳包括与制动助力器相关联的外壳，所述外壳包括一对彼此邻接关系设置的圆柱形构件，并通过由 在多个位置处对邻接构件的周边施加剪切动作。 基本上圆柱形的壳体相对于水平面保持一定角度，然后被驱动旋转。 含有防锈油漆的车辆设置在旋转壳体的下方，壳体定位成使其旋转轴线不与容器相交。 随着壳旋转，壳体的剪切桩周边部分与涂料相连接。
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