公开(公告)号：US07501802B2

公开(公告)日：2009-03-10

申请号：US11723723

申请日：2007-03-21

申请人： Shoichi Nitta ,  Masahiro Matsuo

发明人： Shoichi Nitta ,  Masahiro Matsuo

IPC分类号： G05F1/62 ,  G05F1/618

CPC分类号： H02M3/1582

摘要： A DC-DC converting apparatus including a step-up and step-down circuit stepping up/down an input voltage to generate an output voltage and a PWM control circuit. The PWM control circuit generates an error signal, first to third voltages, a first triangular wave signal varying between the first and second voltages, and a second triangular wave signal varying between the third voltage and a fourth voltage determined based on the first to third voltages. The PWM control circuit compares the error signal with the first and second triangular wave signals and causes the step-up and step-down circuit to step up/down the input voltage based on the comparison. The first to fourth voltages V1 to V4 satisfy V1

摘要翻译： 一种DC-DC转换装置，包括升压和降压电路，用于对输入电压进行升压/降压以产生输出电压和PWM控制电路。 PWM控制电路产生误差信号，第一至第三电压，在第一和第二电压之间变化的第一三角波信号和在基于第一至第三电压确定的第三电压和第四电压之间变化的第二三角波信号 。 PWM控制电路将误差信号与第一和第二三角波信号进行比较，并使升压和降压电路基于比较来升高/降低输入电压。 第一至第四电压V1至V4满足V1

公开(公告)号：US20080211474A1

公开(公告)日：2008-09-04

申请号：US12010539

申请日：2008-01-25

申请人： Shohichi Nitta ,  Masahiro Matsuo ,  Ritsuko Nomura

发明人： Shohichi Nitta ,  Masahiro Matsuo ,  Ritsuko Nomura

IPC分类号： G05F1/10

CPC分类号： H02M3/1582

摘要： A step-up/down DC-DC converter is disclosed that includes: a step-up/down part generating an output voltage by stepping up or down an input voltage; and a control part generating an error signal indicating an error between a voltage value obtained by dividing the output voltage and a predetermined reference voltage, and causing the step-up/down part to perform a step-up or step-down operation based on the comparison between the error signal and first and second triangle wave signals. The control part includes a first circuit generating the first triangle wave signal for step-down control and a second circuit generating the second triangle wave signal for step-up control. The first circuit generates a clock signal synchronized with the first triangle wave signal, and outputs the clock signal to the second circuit. The second circuit generates the second triangle wave signal synchronized with the first triangle wave signal based on the input clock signal.

公开(公告)号：US20080209457A1

公开(公告)日：2008-08-28

申请号：US11859008

申请日：2007-09-21

申请人： Yoichi Narui ,  Goshi Shiroishi ,  Ikuo Nishida ,  Kenji Watabe ,  Masahiro Matsuo

发明人： Yoichi Narui ,  Goshi Shiroishi ,  Ikuo Nishida ,  Kenji Watabe ,  Masahiro Matsuo

IPC分类号： G11B7/08

CPC分类号： G11B33/122 ,  G11B17/056

摘要： The invention provides a disc device capable of offering good SATA interface performance by optimizing the placement of the SATA connector relative to the control board, solving problems concerning noise or unnecessary radiation.A driver IC and DSP for executing main processing concerning disc recording or reproduction processing are installed in a main printed circuit board. A SATA connector having a power supply terminal and signal terminal is fixed to the main printed circuit board. The SATA connector is placed on the board opposite the DSP. Patterns each connecting the power supply terminal to the driver IC and connecting the signal terminal and DSP are formed on the board. The SATA connector and DSP are placed on the driver IC side relative to the central line of the board, the power supply terminal is placed on the driver IC side, and the signal terminal is placed on the DSP side.

摘要翻译： 本发明提供一种能够通过优化SATA连接器相对于控制板的放置而提供良好的SATA接口性能的光盘装置，解决有关噪声或不必要的辐射的问题。 用于执行关于盘记录或再现处理的主要处理的驱动器IC和DSP安装在主印刷电路板中。 具有电源端子和信号端子的SATA连接器固定到主印刷电路板。 SATA连接器放置在与DSP相对的板上。 在电路板上形成各自将电源端子连接到驱动器IC并连接信号端子和DSP的模式。 SATA连接器和DSP相对于板的中心线放置在驱动器IC侧，电源端子放置在驱动器IC侧，信号端子放置在DSP侧。

公开(公告)号：US20080205209A1

公开(公告)日：2008-08-28

申请号：US11858927

申请日：2007-09-21

申请人： KENJI WATABE ,  Ikuo Nishida ,  Yoichi Narui ,  Masahiro Matsuo

发明人： KENJI WATABE ,  Ikuo Nishida ,  Yoichi Narui ,  Masahiro Matsuo

IPC分类号： G11B7/00

CPC分类号： G11B7/082

摘要： The invention provides an optical disc device conducting highly accurate skew adjustment, avoiding an increase in the number of components, and achieving downsizing. This optical disc device includes: a guide shaft for supporting an optical pickup and guiding its movement; a chassis the guide shaft is attached to; a coil spring attached to the chassis for applying force to an end of the guide shaft; an adjustment screw for adjusting the force applied by the coil spring, provided opposite the coil spring with respect to the guide shaft; and a weight addition member attached to the chassis, wherein internal threads for engaging with the adjustment screw are formed in the weight addition member, and the axis of the adjustment screw engaged with the internal thread, the center of a cross section of the guide shaft perpendicular to its axis, and the axis of the coil spring are aligned along the same line.

摘要翻译： 本发明提供一种执行高精度偏斜调整的光盘装置，避免了部件数量的增加，并实现了小型化。 该光盘装置包括：用于支撑光学拾取器并引导其运动的引导轴; 引导轴附接到底盘; 螺旋弹簧，其附接到所述底盘，用于向所述引导轴的端部施加力; 用于调节与所述螺旋弹簧相对于所述引导轴相对设置的由所述螺旋弹簧施加的力的调节螺钉; 以及附接到所述底盘的重量添加构件，其中，在所述配重添加构件中形成用于与所述调节螺钉接合的内螺纹，并且所述调节螺钉的轴线与所述内螺纹接合，所述引导轴的横截面的中心 垂直于其轴线，并且螺旋弹簧的轴线沿着相同的线对齐。

公开(公告)号：US07349624B2

公开(公告)日：2008-03-25

申请号：US10629502

申请日：2003-07-29

申请人： Masahiro Matsuo

发明人： Masahiro Matsuo

IPC分类号： H04N5/91

CPC分类号： H04N21/434 ,  H04N5/76 ,  H04N9/8042 ,  H04N21/42204 ,  H04N21/42661 ,  H04N21/4334 ,  H04N21/47214

摘要： A digital broadcast signal of a channel received in a tuner is converted into digital data by a digital demodulation section. Based on the digital data, a CPU detects the partial of the corresponding subchannel from the whole transport stream (TS) of the digital data and causes a system controller to extract digital data of the subchannel and record the digital data on a hard disk in a predetermined format.

摘要翻译： 在调谐器中接收的频道的数字广播信号由数字解调部分转换成数字数据。 基于数字数据，CPU从数字数据的整个传输流（TS）检测相应子信道的部分，并使系统控制器提取子信道的数字数据，并将数字数据记录在硬盘上 预定格式。

公开(公告)号：US20070283370A1

公开(公告)日：2007-12-06

申请号：US11541530

申请日：2006-10-03

申请人： Masahiro Matsuo ,  Yoichi Narui ,  Ikuo Nishida

发明人： Masahiro Matsuo ,  Yoichi Narui ,  Ikuo Nishida

IPC分类号： G11B17/04 ,  G11B33/12

CPC分类号： G11B17/05 ,  G11B33/12 ,  H05K1/0393

摘要： A flexible printed-wiring circuit board that connects a signal-processing circuit board and a pickup is prevented from coming into contact with the bottom (or the like) of a tray and thus becoming damaged. The flexible printed-wiring circuit board (FPC board) is disposed in a U-shaped folded state in a space sandwiched between a surface along which the tray moves, and a surface on which the signal-processing circuit board is mounted. An extension portion that restricts deformation of the FPC board toward the tray is provided at a connecting end of the pickup. Length D of the extension portion is set such that length S of the FPC board from a front end of the extension portion to a fold-back position of the FPC board is equal to or less than a required value.

摘要翻译： 防止连接信号处理电路板和拾取器的柔性印刷电路板与托盘的底部（或类似物）接触，从而被损坏。 柔性印刷布线电路板（FPC基板）在夹在托盘移动的表面之间的空间和安装有信号处理电路板的表面之间的空间中被设置成U形折叠状态。 在拾取器的连接端设置有限制FPC板朝向托盘的变形的延伸部。 扩展部的长度D被设定为使得FPC板从FPC延伸部的前端到FPC板的折回位置的长度S等于或小于所需值。

公开(公告)号：US07202644B2

公开(公告)日：2007-04-10

申请号：US11153544

申请日：2005-06-16

申请人： Shoichi Nitta ,  Masahiro Matsuo

发明人： Shoichi Nitta ,  Masahiro Matsuo

IPC分类号： G05F1/62 ,  G05F1/618

CPC分类号： H02M3/1582

摘要： A DC-DC converting apparatus including a step-up and step-down circuit stepping up/down an input voltage to generate an output voltage and a PWM control circuit. The PWM control circuit generates an error signal, first to third voltages, a first triangular wave signal varying between the first and second voltages, and a second triangular wave signal varying between the third voltage and a fourth voltage determined based on the first to third voltages. The PWM control circuit compares the error signal with the first and second triangular wave signals and causes the step-up and step-down circuit to step up/down the input voltage based on the comparison. The first to fourth voltages V1 to V4 satisfy V1

摘要翻译： 一种DC-DC转换装置，包括升压和降压电路，用于对输入电压进行升压/降压以产生输出电压和PWM控制电路。 PWM控制电路产生误差信号，第一至第三电压，在第一和第二电压之间变化的第一三角波信号和在基于第一至第三电压确定的第三电压和第四电压之间变化的第二三角波信号 。 PWM控制电路将误差信号与第一和第二三角波信号进行比较，并使升压和降压电路基于比较来升高/降低输入电压。 第一至第四电压V 1至V 4满足V 1

公开(公告)号：US20060208718A1

公开(公告)日：2006-09-21

申请号：US10554404

申请日：2004-04-22

申请人： Shohichi Nitta ,  Masahiro Matsuo ,  Ritsuko Nomura

发明人： Shohichi Nitta ,  Masahiro Matsuo ,  Ritsuko Nomura

IPC分类号： G05F1/00

CPC分类号： H02M3/1582

摘要： A step-up/down DC-DC converter is disclosed that includes: a step-up/down part generating an output voltage by stepping up or down an input voltage; and a control part generating an error signal indicating an error between a voltage value obtained by dividing the output voltage and a predetermined reference voltage, and causing the step-up/down part to perform a step-up or step-down operation based on the comparison between the error signal and first and second triangle wave signals. The control part includes a first circuit generating the first triangle wave signal for step-down control and a second circuit generating the second triangle wave signal for step-up control. The first circuit generates a clock signal synchronized with the first triangle wave signal, and outputs the clock signal to the second circuit. The second circuit generates the second triangle wave signal synchronized with the first triangle wave signal based on the input clock signal.

摘要翻译： 公开了一种升压/降压DC-DC转换器，其包括：升压/降压部分，通过升压或降低输入电压产生输出电压; 以及控制部，其生成表示通过分压输出电压而获得的电压值与预定参考电压之间的误差的误差信号，并且使升压/降压部分基于所述输出电压进行升压或降压操作 误差信号与第一和第二三角波信号的比较。 控制部分包括产生用于降压控制的第一三角波信号的第一电路和产生用于升压控制的第二三角波信号的第二电路。 第一电路产生与第一三角波信号同步的时钟信号，并将时钟信号输出到第二电路。 第二电路基于输入时钟信号产生与第一三角波信号同步的第二三角波信号。

公开(公告)号：US06849206B2

公开(公告)日：2005-02-01

申请号：US09879584

申请日：2001-06-12

申请人： Masahiro Matsuo

发明人： Masahiro Matsuo

IPC分类号： B01D29/11 ,  B01D39/12 ,  B01D39/20 ,  C04B35/00 ,  H01B1/22 ,  H01B13/00 ,  B32B5/26

CPC分类号： B01D39/12 ,  B01D39/2031 ,  B01D39/2041

摘要： A method for manufacturing a paste for forming a thick film is provided, in which undesired lump materials are efficiently removed from the paste for forming the thick film. The paste, which contains a solid material and an organic vehicle and has a viscosity in the range of about 1 to 50 Pa·s, is filtrated with a sintered metal type filter manufactured by integrally sintering a nonwoven fabric filter part, having a thickness of many folded linear metal fibers and having a mesh opening size of about 1 to 20 μm, and a wire gauze part composed of metal wires knitted into the shape of a mesh.

摘要翻译： 提供一种用于制造用于形成厚膜的糊料的方法，其中从用于形成厚膜的糊料中有效地除去不需要的块状材料。 含有固体材料和有机载体并且具有约1至50Pa.s范围内的粘度的糊状物通过烧结金属型过滤器过滤，所述烧结金属型过滤器通过一体烧结无纺布过滤器部件， 许多折叠的线状金属纤维并且具有约1至20μm的网孔尺寸，以及由编织成网状的金属丝组成的金属丝网部分。

公开(公告)号：US6104057A

公开(公告)日：2000-08-15

申请号：US138891

申请日：1998-08-24

申请人： Hiroaki Nakanishi ,  Kunio Matsudaira ,  Masahiro Matsuo ,  Hirohisa Abe ,  Yoichi Sakai

发明人： Hiroaki Nakanishi ,  Kunio Matsudaira ,  Masahiro Matsuo ,  Hirohisa Abe ,  Yoichi Sakai

IPC分类号： G11C16/04 ,  H01L29/423 ,  H01L29/76

CPC分类号： G11C16/0491 ,  G11C16/0425 ,  G11C16/0433 ,  H01L29/42324

摘要： An electrically alterable non-volatile memory device is disclosed. In the device architecture of the memory device, control gates are formed, divided corresponding to the blocks and interconnected independently within each block, to further be connected to a metal gate line through block select MOS transistors which are formed on a semiconductor substrate between the blocks. All gate electrodes of the block select MOS transistors which are connected to the control gates interconnected as above within each block are further connected each other. These block select transistors can be controlled by applying erase block signals such as, EBS0, EBS1 and so on, to respective transistors. In addition, the control gates are further connected to a decoder such that some of these control gates may be selected through metal control gate lines. With the block select transistors together with the metal control gate line provided as above, erasing can be achieved in the unit of memory cells which are connected to a metal control gate line within a block.

摘要翻译： 公开了一种电可更改的非易失性存储器件。 在存储器件的器件架构中，形成控制栅极，对应于块并且在每个块内独立互连，以进一步通过形成在块之间的半导体衬底上的块选择MOS晶体管连接到金属栅极线 。 在各块内连接到如上互连的控制栅极的块选择MOS晶体管的所有栅极电极彼此进一步连接。 可以通过将诸如EBS0，EBS1等的擦除块信号施加到相应的晶体管来控制这些块选择晶体管。 此外，控制栅极进一步连接到解码器，使得这些控制栅极中的一些可以通过金属控制栅极线选择。 通过块选择晶体管与如上所述设置的金属控制栅极线一起，可以以连接到块内的金属控制栅极线的存储单元为单位实现擦除。