METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING OPTIMIZING C-STATE SELECTION UNDER VARIABLE WAKEUP RATES
    75.
    发明申请
    METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING OPTIMIZING C-STATE SELECTION UNDER VARIABLE WAKEUP RATES 有权
    能源效率和能源保护的方法,装置和系统,包括在可变的唤醒速率下优化C状态选择

    公开(公告)号:US20130097437A9

    公开(公告)日:2013-04-18

    申请号:US13339284

    申请日:2011-12-28

    IPC分类号: G06F1/32

    摘要: A processor may include power management techniques to, dynamically, chose an optimal C-state for the processing core. The measurement of real workloads on the OSes exhibit two important observations (1) the bursts of high interrupt rate are interspersed between the low interrupt rate periods and long periods of high activity levels; and (2) the interrupt rate may, suddenly, fall below an interrupt rate (of 1 milli-second, for example) that is typical of the current operating systems (OS). Instead of determining the C-state based on the stale data stored in the counters, the power control logic may determine an optimal C-state by overriding the C-state determined by the OS or any other power monitoring logic. The power control logic may, dynamically, determine an optimal C-state based on the CPU idle residency times and variable rate wakeup events to match the expected wakeup event rate.

    摘要翻译: 处理器可以包括动态地为处理核心选择最佳C状态的电源管理技术。 对操作系统的实际工作负载的测量表现出两个重要的观察结果:(1)高中断率的突发散布在低中断速率周期和长时间的高活动水平之间; 和(2)中断率可能突然降低到当前操作系统(OS)的典型值的中断速率(例如,1毫秒)。 功率控制逻辑可以基于存储在计数器中的陈旧数据来确定C状态,而不是通过覆盖由OS或任何其它功率监视逻辑确定的C状态来确定最佳C状态。 功率控制逻辑可以动态地基于CPU空闲驻留时间和可变速率唤醒事件来确定最佳C状态以匹配预期的唤醒事件速率。

    Power management coordination in multi-core processors
    80.
    发明授权
    Power management coordination in multi-core processors 有权
    多核处理器中的电源管理协调

    公开(公告)号:US07966511B2

    公开(公告)日:2011-06-21

    申请号:US10899674

    申请日:2004-07-27

    IPC分类号: G06F1/00 G06F9/00

    摘要: Systems and methods of managing power provide for issuing a first operating requirement from a first processor core and issuing a second operating requirement from a second processor core. In one embodiment, the operating requirements can reflect either a power policy or a performance policy, depending upon the factor that is currently most important to software. Hardware coordination logic is used to coordinate a shared resource setting with the operating requirements. The hardware coordination logic is also able to coordinate the shared resource setting with independent resource settings of the first and second processor cores based on the operating requirements.

    摘要翻译: 管理电力的系统和方法提供从第一处理器核发出第一操作要求并从第二处理器核发出第二操作要求。 在一个实施例中,操作要求可以反映功率策略或性能策略,这取决于当前对软件最重要的因素。 硬件协调逻辑用于根据操作要求协调共享资源设置。 硬件协调逻辑还能够基于操作要求来协调共享资源设置与第一和第二处理器核心的独立资源设置。