公开(公告)号：US09552887B2

公开(公告)日：2017-01-24

申请号：US14811222

申请日：2015-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghoon Kim ,  Jun Jin Kong ,  Changkyu Seol ,  Hong Rak Son

IPC: G11C16/04 ,  G11C16/26 ,  G11C11/56 ,  G11C16/34 ,  G11C16/10

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/3422 ,  G11C16/349

Abstract: A memory system includes: a bit counter and a regression analyzer. The bit counter is configured to generate a plurality of count values based on data read from selected memory cells using a plurality of different read voltages, each of the plurality of count values being indicative of a number of memory cells of a memory device having threshold voltages between pairs of the plurality of different read voltages. The regression analyzer is configured to determine read voltage for the selected memory cells based on the plurality of count values using regression analysis.

Abstract translation: 存储器系统包括：位计数器和回归分析器。 位计数器被配置为基于使用多个不同的读取电压从所选择的存储器单元读取的数据生成多个计数值，多个计数值中的每一个表示具有阈值电压的存储器件的存储单元的数量 在多个不同读取电压的对之间。 回归分析器被配置为使用回归分析来基于多个计数值来确定所选择的存储器单元的读取电压。

公开(公告)号：US20160211028A1

公开(公告)日：2016-07-21

申请号：US14600754

申请日：2015-01-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Amit Berman ,  Uri Beitler ,  Jun Jin Kong

IPC: G11C16/24 ,  G11C16/32

CPC classification number: G11C7/1006 ,  G11C16/0483 ,  G11C16/10 ,  G11C2207/102

Abstract: A method of operating a memory device is provided. The memory device includes a plurality of multi-level memory cells of which each memory cell includes L levels. Data which is expressed in a binary number is received. A P-length string is generated from the data. The P-length string is converted to a Q-length string. The Q-length string is distributed using I levels by eliminating at least one level from the L levels. P and Q represent binary bit lengths of the P-length string and the Q-length string. Q is greater than P. L represents a maximum number of levels which each multi-level memory cell has. I is smaller than L. The Q-length string is programmed into the plurality of memory cells.

Abstract translation: 提供了一种操作存储器件的方法。 存储器件包括多个多级存储器单元，每个存储器单元包括L级。 接收以二进制数表示的数据。 从数据生成P长度字符串。 P长度字符串转换为Q长度字符串。 通过从L级消除至少一个级别，使用I级分布Q长度字符串。 P和Q表示P长度字符串和Q长度字符串的二进制位长度。 Q大于P。L表示每个多级存储器单元具有的最大级别数。 I小于L.将Q长度的串编程到多个存储单元中。

公开(公告)号：US09378192B2

公开(公告)日：2016-06-28

申请号：US14205478

申请日：2014-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moshe Schwartz ,  Hong Rak Son ,  Jun Jin Kong ,  Jung Soo Chung

IPC: G06F11/00 ,  G06F17/22 ,  H03M13/15 ,  H03M13/29 ,  G06F11/10

CPC classification number: G06F17/2223 ,  G06F11/004 ,  G06F11/1072 ,  G06F17/2217 ,  H03M13/152 ,  H03M13/2906

Abstract: A method of operating a memory controller is provided. The method includes determining a data state based on an input stream including multiple alphabet letters, converting a part of the input stream, which corresponds to a conversion size, into alphabet letters in a lower numeral system when the data state is determined to be a first state among multiple predetermined data states, inserting one of the converted alphabet letters into the input stream, and outputting each of the alphabet letters in the input stream as is when the data state is determined to be a second state among the predetermined data states.

Abstract translation: 提供了一种操作存储器控制器的方法。 该方法包括：当数据状态被确定为第一个时，基于包括多个字母表的输入流确定数据状态，将与转换大小对应的输入流的一部分转换成较低数字系统中的字母 在多个预定数据状态中，将所转换的字母字母之一插入到输入流中，并且在数据状态被确定为预定数据状态之间的第二状态时输出输入流中的每个字母。