公开(公告)号：US07355488B2

公开(公告)日：2008-04-08

申请号：US11453495

申请日：2006-06-15

申请人： Kwang-Il Park

发明人： Kwang-Il Park

IPC分类号： H03K3/03

CPC分类号： H03K3/0322 ,  H03F3/45183 ,  H03F2203/45644

摘要： A differential amplifier circuit for use in a ring oscillator includes first and second MOS transistors to each source of which an operating power source voltage is applied, and which individually respond to first and second input signals with mutually contrary phases applied to gates thereof; cross-coupled first and second-stage transistors of which each drain-source channel is connected between each drain of the first and second MOS transistors and a ground voltage level; a first variable resistance, which is connected between a drain of the first MOS transistor cross-connected to a second gate of the cross-coupled second-stage transistors, and a first gate of the cross-coupled first-stage transistors, and which is controlled by the operating power source voltage applied to a gate thereof; and a second variable resistance, which is connected between a drain of the second MOS transistor cross-connected to a second gate of the cross-coupled first-stage transistors, and a first gate of the cross-coupled second-stage transistors, and which is controlled by the operating power source voltage applied to a gate thereof. Accordingly, the ring oscillator can ensure a greater resonance frequency range as compared with the conventional oscillator, and, at the same time, jitter characteristics are improved.

摘要翻译： 用于环形振荡器的差分放大器电路包括施加工作电源电压的每个源的第一和第二MOS晶体管，并且对施加到其栅极的相互相反的相位单独地响应于第一和第二输入信号; 交叉耦合的第一和第二级晶体管，其中每个漏极 - 源极沟道连接在第一和第二MOS晶体管的每个漏极和接地电压电平之间; 第一可变电阻，其连接在交叉连接到交叉耦合的第二级晶体管的第二栅极的第一MOS晶体管的漏极和交叉耦合的第一级晶体管的第一栅极之间，并且其是 由施加到其门的工作电源电压控制; 以及第二可变电阻，其连接在交叉连接到交叉耦合的第一级晶体管的第二栅极的第二MOS晶体管的漏极和交叉耦合的第二级晶体管的第一栅极之间，并且其中 由施加到其栅极的工作电源电压控制。 因此，与常规振荡器相比，环形振荡器可以确保更大的谐振频率范围，并且同时改善抖动特性。

公开(公告)号：US20080025451A1

公开(公告)日：2008-01-31

申请号：US11826511

申请日：2007-07-16

申请人： Byung-Guk Kim ,  Lee-Sup Kim ,  Kwang-Il Park

发明人： Byung-Guk Kim ,  Lee-Sup Kim ,  Kwang-Il Park

IPC分类号： H04L7/06

CPC分类号： H03K5/15013

摘要： A multi-phase signal generator may include a duty control buffer configured to receive a first differential input signal and a second differential input signal, and generate a first differential output signal and a second differential output signal having variable duty ratios based on a control voltage, a first edge combiner configured to generate a first pulse signal based on first edges of the respective first and second differential output signals, a second edge combiner configured to generate a second pulse signal based on second edges of the respective first and second differential output signals, and a control voltage generator configured to generate the control voltage in response to a logic signal obtained by performing a logic operation on the first and second pulse signals.

摘要翻译： 多相信号发生器可以包括配置成接收第一差分输入信号和第二差分输入信号的占空比控制缓冲器，并且基于控制电压产生具有可变占空比的第一差分输出信号和第二差分输出信号， 第一边缘组合器，被配置为基于相应的第一和第二差分输出信号的第一边缘产生第一脉冲信号;第二边缘组合器，被配置为基于相应的第一和第二差分输出信号的第二边缘产生第二脉冲信号， 以及控制电压发生器，被配置为响应于通过对所述第一和第二脉冲信号执行逻辑运算而获得的逻辑信号来产生所述控制电压。

公开(公告)号：US20070284993A1

公开(公告)日：2007-12-13

申请号：US11576882

申请日：2005-10-07

申请人： Do-Hyung Kim ,  Chung-Hoon Lee ,  Keon-Young Lee ,  Kwang-Il Park

发明人： Do-Hyung Kim ,  Chung-Hoon Lee ,  Keon-Young Lee ,  Kwang-Il Park

IPC分类号： F21K2/00 ,  G02B17/00

CPC分类号： G02B19/0071 ,  G02B19/0028 ,  G02B19/0061 ,  H01L33/54 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/19107 ,  H01L2924/00014

摘要： The present invention relates to a side illumination lens and a luminescent device using the same, and provides a body, a total reflection surface with a total reflection slope with respect to a central axis of the body, and a linear and/or curved refractive surface(s) formed to extend from a periphery of the total reflection surface; and a luminescent device including the lens. According to the present invention, a lens with total internal reflection surfaces with different slopes, and a linear and/or curved refractive surface(s) allows light emitted forward from a luminescent chip to be guided to a side of the lens. Further, a linear surface(s) formed in a direction perpendicular or parallel to a central axis of a lens and a curved surface are formed on an edge of the lens so that a process of fabricating the lens is facilitated, thereby reducing a defective rate and fabrication costs of the lens.

摘要翻译： 本发明涉及一种侧面照明透镜及其使用该发光装置的发光装置，其特征在于，具有相对于所述主体的中心轴线具有全反射斜率的全身反射面以及直线和/或弯曲的折射面 形成为从全反射表面的周边延伸; 以及包括该透镜的发光装置。 根据本发明，具有具有不同斜率的全内反射表面以及线性和/或弯曲折射表面的透镜允许从发光芯片向前发射的光被引导到透镜的一侧。 此外，在透镜的边缘上形成在垂直于或平行于透镜的中心轴线的方向上形成的线性表面，从而便于制造透镜的工艺，从而降低了缺陷率 和镜头的制造成本。

公开(公告)号：US20070040622A1

公开(公告)日：2007-02-22

申请号：US11453495

申请日：2006-06-15

申请人： Kwang-Il Park

发明人： Kwang-Il Park

IPC分类号： H03K3/03

CPC分类号： H03K3/0322 ,  H03F3/45183 ,  H03F2203/45644

摘要： A differential amplifier circuit for use in a ring oscillator includes first and second MOS transistors to each source of which an operating power source voltage is applied, and which individually respond to first and second input signals with mutually contrary phases applied to gates thereof; cross-coupled first and second-stage transistors of which each drain-source channel is connected between each drain of the first and second MOS transistors and a ground voltage level; a first variable resistance, which is connected between a drain of the first MOS transistor cross-connected to a second gate of the cross-coupled second-stage transistors, and a first gate of the cross-coupled first-stage transistors, and which is controlled by the operating power source voltage applied to a gate thereof; and a second variable resistance, which is connected between a drain of the second MOS transistor cross-connected to a second gate of the cross-coupled first-stage transistors, and a first gate of the cross-coupled second-stage transistors, and which is controlled by the operating power source voltage applied to a gate thereof. Accordingly, the ring oscillator can ensure a greater resonance frequency range as compared with the conventional oscillator, and, at the same time, jitter characteristics are improved.

摘要翻译： 用于环形振荡器的差分放大器电路包括施加工作电源电压的每个源的第一和第二MOS晶体管，并且对施加到其栅极的相互相反的相位单独地响应于第一和第二输入信号; 交叉耦合的第一和第二级晶体管，其中每个漏极 - 源极沟道连接在第一和第二MOS晶体管的每个漏极和接地电压电平之间; 第一可变电阻，其连接在交叉连接到交叉耦合的第二级晶体管的第二栅极的第一MOS晶体管的漏极和交叉耦合的第一级晶体管的第一栅极之间，并且其是 由施加到其门的工作电源电压控制; 以及第二可变电阻，其连接在交叉连接到交叉耦合的第一级晶体管的第二栅极的第二MOS晶体管的漏极和交叉耦合的第二级晶体管的第一栅极之间，并且其中 由施加到其栅极的工作电源电压控制。 因此，与常规振荡器相比，环形振荡器可以确保更大的谐振频率范围，并且同时改善抖动特性。

公开(公告)号：US20060103451A1

公开(公告)日：2006-05-18

申请号：US11281347

申请日：2005-11-16

申请人： Jong-Hyoung Lim ,  Kwang-Il Park

发明人： Jong-Hyoung Lim ,  Kwang-Il Park

IPC分类号： G05F1/10

CPC分类号： G05F1/575

摘要： A reference voltage generator generates an output reference voltage having various voltage levels. The reference voltage generator includes an amplifier to amplify a difference between a feedback reference voltage and a feedback voltage to generate an amplified signal, a current driving circuit to provide a current signal in response to the amplified signal, a scaler circuit to generate feedback voltage signals and reference voltage signals in response to the current signal, and a feedback voltage selecting circuit to select one of the feedback voltage signals in response to a control signal, and to provide the selected feedback voltage signal to the operational amplifier as the feedback voltage.

摘要翻译： 参考电压发生器产生具有各种电压电平的输出参考电压。 参考电压发生器包括放大器，用于放大反馈参考电压和反馈电压之间的差以产生放大信号;电流驱动电路，用于响应于放大的信号提供电流信号;定标器电路，用于产生反馈电压信号 以及响应于当前信号的参考电压信号，以及反馈电压选择电路，用于响应于控制信号选择反馈电压信号中的一个，并将选择的反馈电压信号提供给运算放大器作为反馈电压。

公开(公告)号：US07042022B2

公开(公告)日：2006-05-09

申请号：US10754389

申请日：2004-01-09

申请人： Kwan-Young Han ,  Do-Hyung Kim ,  Seung-Man Yang ,  Chung-Hoon Lee ,  Hong-San Kim ,  Kwang-Il Park

发明人： Kwan-Young Han ,  Do-Hyung Kim ,  Seung-Man Yang ,  Chung-Hoon Lee ,  Hong-San Kim ,  Kwang-Il Park

IPC分类号： H01L29/22

CPC分类号： H01L33/54 ,  H01L33/486 ,  H01L2224/48091 ,  H01L2924/1815 ,  H01L2924/00014

摘要： A chip light emitting diode having a wide viewing angle, and a fabrication method thereof. The chip light emitting diode has a resin package sealing a light emitting chip which has at least one curved projecting part. The curved projecting part has a cross section which is substantially semicircular, or substantially or partially elliptical or parabolic. The curved projecting part preferably has a cross section which is comprised of a plurality of straight lines, an angle being formed between adjacent lines. The cross section is elongated to form a cylindrical outer surface of the resin package.

摘要翻译： 具有宽视角的芯片发光二极管及其制造方法。 芯片发光二极管具有密封具有至少一个弯曲突出部分的发光芯片的树脂封装。 弯曲的突出部分具有基本上是半圆形的或基本上或部分是椭圆形或抛物线形的横截面。 弯曲的突出部分优选地具有由多条直线组成的横截面，在相邻线之间形成一角度。 横截面是细长的以形成树脂封装的圆柱形外表面。

公开(公告)号：US20060091921A1

公开(公告)日：2006-05-04

申请号：US11235646

申请日：2005-09-26

申请人： Kwang-Il Park ,  Hyun-Dong Kim ,  Mi-Jin Lee

发明人： Kwang-Il Park ,  Hyun-Dong Kim ,  Mi-Jin Lee

IPC分类号： H03K3/017

CPC分类号： G11C11/15 ,  G11C11/5607 ,  H03K5/133 ,  H03K5/1565 ,  H03L7/0812 ,  H03L7/0891

摘要： Provided are a duty cycle correction circuit and method for duty cycle correction in a delay locked loop using an inversion locking scheme. The duty cycle correction circuit comprises: a correction unit exchanging and receiving a first duty correction signal and a second duty correction signal and selecting and receiving one of an input clock signal and an inversion signal of the input clock signal in response to an inversion locking signal, and correcting the duty cycle of the received input clock signal or inversion signal of the input clock signal in response to the first and second duty correction signals; a buffer buffering an output signal of the correction unit and outputting the buffered signal as a corrected clock signal; and a duty detector selecting and receiving one of the corrected clock signal and an inversion signal of the corrected clock signal in response to the inversion locking signal, and generating the first and second duty correction signals using the received corrected clock signal or inversion signal of the corrected clock signal.

摘要翻译： 提供了一种使用反转锁定方案的延迟锁定环中的占空比校正电路和方法。 占空比校正电路包括：校正单元，响应于反相锁定信号，交换和接收第一占空比校正信号和第二占空比校正信号，并选择和接收输入时钟信号和反相信号之一 并且响应于第一和第二占空比校正信号，校正接收到的输入时钟信号的占空比或输入时钟信号的反相信号; 缓冲校正单元的输出信号并输出​​缓冲信号作为校正时钟信号的缓冲器; 以及负载检测器，其响应于所述反相锁定信号选择和接收所述经校正的时钟信号中的一个和所述经校正的时钟信号的反相信号，以及使用所接收的校正时钟信号或所述反相信号产生所述第一和第二占空比校正信号 校正时钟信号。

公开(公告)号：US20060022717A1

公开(公告)日：2006-02-02

申请号：US11188952

申请日：2005-07-25

申请人： Kwang-Il Park

发明人： Kwang-Il Park

IPC分类号： G01R29/00

CPC分类号： G01R25/005 ,  H03D13/003

摘要： A circuit for detecting phase includes a first inverter, a second inverter, a differential amplifier, an output load latch and an output latch. The first and second inverters receive an input signal and an inverted input signal to generate first and second differential input signals in response to a clock signal and first and second control signals, respectively, and shut off transmissions of the input signal and the inverted input signal. The differential amplifier differentially amplifies the first and second differential input signals in response to the clock signal to provide first and second differential output signals as the first and second control signals. The output load latch latches the first and second differential output signals to generate the first and second latch output signals. The output latch latches the first and second latch output signals to output a phase detection signal.

摘要翻译： 用于检测相位的电路包括第一反相器，第二反相器，差分放大器，输出负载锁存器和输出锁存器。 第一和第二反相器接收输入信号和反相输入信号，以分别响应于时钟信号和第一和第二控制信号产生第一和第二差分输入信号，并切断输入信号和反相输入信号的传输 。 差分放大器响应于时钟信号差分放大第一和第二差分输入信号，以提供第一和第二差分输出信号作为第一和第二控制信号。 输出负载锁存器锁存第一和第二差分输出信号以产生第一和第二锁存器输出信号。 输出锁存器锁存第一和第二锁存器输出信号以输出相位检测信号。

公开(公告)号：US20050237105A1

公开(公告)日：2005-10-27

申请号：US11115832

申请日：2005-04-27

申请人： Kwang-Il Park

发明人： Kwang-Il Park

IPC分类号： G11C5/14 ,  G05F3/30 ,  H03F3/45

CPC分类号： G05F3/30

摘要： A bandgap reference voltage generation circuit insensitive to a change of a power supply voltage includes an OP amplifier and first through third PMOS transistors and generates a reference voltage, where the OP amplifier supplies an output voltage as a bias voltage and compares first and second voltages, the first through third PMOS transistors are gated to an output voltage of the OP amplifier and deliver currents of identical levels, the first voltage corresponds to a current that is passed through the first PMOS transistor and connected to a first resistor and a first diode which are connected to each other in parallel, the second voltage is applied to a second resistor connected in parallel to the second PMOS transistor, a third resistor serially connected to the second PMOS transistor, and a second diode group serially connected to the third resistor, the reference voltage is a voltage corresponding to a current that is passed through the third PMOS transistor and applied to a fourth resistor, such that the bandgap reference voltage generation circuit generates a stable reference voltage according to a ratio of resistance values of the resistors instead of absolute values of the resistance values without being affected by the power supply voltage change.

摘要翻译： 对电源电压变化不敏感的带隙参考电压产生电路包括OP放大器和第一至第三PMOS晶体管，并产生参考电压，其中OP放大器提供输出电压作为偏置电压，并且比较第一和第二电压， 第一至第三PMOS晶体管被选通到OP放大器的输出电压并传递相同电平的电流，第一电压对应于通过第一PMOS晶体管并连接到第一电阻器和第一二极管的电流， 将第二电压并联连接到与第二PMOS晶体管并联连接的第二电阻器，串联连接到第二PMOS晶体管的第三电阻器和串联连接到第三电阻器的第二二极管组，该参考电压 电压是对应于通过第三PMOS晶体管并施加到fou的电流的电压 使得带隙参考电压产生电路根据电阻器的电阻值的比率而不是电源电压变化的影响而产生稳定的参考电压而不是电阻值的绝对值。

公开(公告)号：US08254184B2

公开(公告)日：2012-08-28

申请号：US12820364

申请日：2010-06-22

申请人： Young-Soo Sohn ,  Jeong-Don Lim ,  Kwang-Il Park

发明人： Young-Soo Sohn ,  Jeong-Don Lim ,  Kwang-Il Park

IPC分类号： G11C7/00 ,  G11C5/14 ,  G11C8/00

CPC分类号： G11C7/22 ,  G11C7/1051 ,  G11C7/109 ,  G11C7/222 ,  G11C2207/2272

摘要： A semiconductor memory device includes a latency controller which provides a power-saving effect. The latency controller includes a first-in first-out (FIFO) register. After a read command is applied, when a precharge command or power-down command is applied, the latency controller outputs a latency signal corresponding to the applied read command and blocks application of sampling and transmission clock signals to the FIFO register.

摘要翻译： 半导体存储器件包括提供省电效果的等待时间控制器。 等待时间控制器包括先进先出（FIFO）寄存器。 在应用读命令之后，当应用预充电命令或掉电命令时，等待时间控制器输出与所应用的读命令对应的等待时间信号，并阻止采样和发送时钟信号的应用到FIFO寄存器。