公开(公告)号：US08331050B1

公开(公告)日：2012-12-11

申请号：US12888744

申请日：2010-09-23

申请人： Qiyue Zou ,  Xueshi Yang ,  Gregory Burd

发明人： Qiyue Zou ,  Xueshi Yang ,  Gregory Burd

IPC分类号： G11B5/09

CPC分类号： G11B5/746 ,  G11B5/59616

摘要： A write clock synchronization system includes a channel module that reads a servo section of a bit-patterned magnetic medium to determine a preamble signal based on the servo section. An initial phase estimating system estimates an initial phase of the preamble signal based on servo clock samples of the preamble signal and estimates an initial phase of the preamble signal based on write clock samples of the preamble signal. A phase determination module estimates a phase of the write clock signal based on the initial phase of the preamble signal estimated using the servo clock samples and the initial phase of the preamble signal estimated using the write clock samples. A phase error module estimates a phase error based on the phase of the write clock signal. The channel module writes data to discontinuous bit islands of the bit-patterned magnetic medium based on the phase error.

摘要翻译： 写时钟同步系统包括通道模块，其读取位图形磁介质的伺服部分，以基于伺服部分确定前导信号。 初始相位估计系统基于前导信号的伺服时钟采样来估计前置信号的初始相位，并且基于前导码信号的写入时钟采样来估计前导码信号的初始相位。 相位确定模块基于使用伺服时钟采样估计的前导信号的初始相位和使用写入时钟采样估计的前导信号的初始相位来估计写入时钟信号的相位。 相位误差模块基于写时钟信号的相位来估计相位误差。 通道模块基于相位误差将数据写入位图形磁介质的不连续位岛。

公开(公告)号：US08106799B1

公开(公告)日：2012-01-31

申请号：US12728726

申请日：2010-03-22

申请人： Xueshi Yang ,  Gregory Burd

发明人： Xueshi Yang ,  Gregory Burd

IPC分类号： H03M7/00

CPC分类号： H03M7/3086 ,  H03M7/6023 ,  H03M7/6029

摘要： The present disclosure includes apparatus, systems and techniques relating to pipelined processing. In some implementations, a method performed by a data processing device includes storing data in a memory module. The method includes processing the stored data in accordance with a compression algorithm to produce processed data. Processing the stored data includes pipelined processing of a defined number of symbols of the stored data in parallel, and discarding results of the pipelined processing that are rendered invalid by other results of the pipelined processing. Additionally, the method includes outputting the processed data.

摘要翻译： 本公开包括与流水线处理相关的装置，系统和技术。 在一些实现中，由数据处理设备执行的方法包括将数据存储在存储器模块中。 该方法包括根据压缩算法对所存储的数据进行处理以产生处理后的数据。 处理存储的数据包括并行地存储的数据的定义数量的符号的流水线处理，以及通过流水线处理的其他结果废弃被流水线处理的结果无效的结果。 另外，该方法包括输出处理的数据。

公开(公告)号：US08042027B1

公开(公告)日：2011-10-18

申请号：US12014556

申请日：2008-01-15

申请人： Gregory Burd ,  Xueshi Yang

发明人： Gregory Burd ,  Xueshi Yang

IPC分类号： H03M13/03

CPC分类号： H03M13/251 ,  H03M13/256 ,  H04L1/0054 ,  H04L1/0058 ,  H04L1/006 ,  H04L25/03178 ,  H04L25/03197 ,  H04L25/067 ,  H04L2025/0342

摘要： Systems and methods for processing and decoding TCM/BCM-coded signal vectors. A multi-dimensional signal vector is received by, for example, a TCM or BCM decoder. The TCM/BCM decoder identifies the closest signal points in the signal constellation set, or “nearest neighbors,” for each dimension of the received signal vector. The TCM/BCM decoder then forms a test set that includes a plurality of multi-dimensional test vectors, where each dimension of each test vector is based on an identified nearest neighbor. In particular, each test point in the test set is based on a different combination of the nearest neighbors. The TCM/BCM decoder can compute branch metrics based on only the test points in the test set, and can make detection decisions using the computed branch metrics.

摘要翻译： 用于处理和解码TCM / BCM编码信号向量的系统和方法。 多维信号矢量由例如TCM或BCM解码器接收。 对于接收信号向量的每个维度，TCM / BCM解码器识别信号星座集中最接近的信号点或“最近邻居”。 然后，TCM / BCM解码器形成包括多个多维测试向量的测试集，其中每个测试向量的每个维度基于所识别的最近邻。 特别地，测试集中的每个测试点基于最近邻的不同组合。 TCM / BCM解码器可以仅基于测试集中的测试点计算分支度量，并且可以使用计算的分支度量来进行检测决策。

公开(公告)号：US20090040081A1

公开(公告)日：2009-02-12

申请号：US12187160

申请日：2008-08-06

申请人： Xueshi Yang ,  Gregory Burd ,  Heng Tang ,  Panu Chaichanavong ,  Zinging Wu

发明人： Xueshi Yang ,  Gregory Burd ,  Heng Tang ,  Panu Chaichanavong ,  Zinging Wu

IPC分类号： H03M13/00

CPC分类号： H03M13/2945 ,  G06F11/1068 ,  H03M13/033 ,  H03M13/1515 ,  H03M13/2903 ,  H03M13/2906

摘要： Systems, apparatuses, and methods for encoding and decoding using generalized concatenated codes (GCC) are described. The methods include receiving data; encoding the received data to obtain first encoded data; encoding the first encoded data until a GCC encoding reaches an intermediate level; and terminating the GCC encoding at the intermediate level.

摘要翻译： 描述使用广义级联码（GCC）的编码和解码的系统，装置和方法。 方法包括接收数据; 对所接收的数据进行编码以获得第一编码数据; 对第一编码数据进行编码，直到GCC编码达到中间级; 并终止中级的GCC编码。

公开(公告)号：US08825945B2

公开(公告)日：2014-09-02

申请号：US13360626

申请日：2012-01-27

申请人： Shashi Kiran Chilappagari ,  Xueshi Yang ,  Gregory Burd

发明人： Shashi Kiran Chilappagari ,  Xueshi Yang ,  Gregory Burd

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/06

CPC分类号： G06F12/0246 ,  G06F2212/7201 ,  G11C11/5621 ,  G11C16/10 ,  G11C16/34

摘要： The present disclosure includes systems and techniques relating to non-volatile memory. A described system, for example, includes a non-volatile memory structure having a plurality of multi-level memory cells, a processing device, and a controller. The controller is configured to map a first portion of a first set of consecutive bits of a data segment to a first page associated with the plurality of multi-level memory cells, and map a second portion of the first set of consecutive bits of the data segment to a second page associated with the plurality of multi-level memory cells. The first page is associated with bits of a first significance, and the second page is associated with bits of a second significance.

摘要翻译： 本公开包括与非易失性存储器有关的系统和技术。 所描述的系统例如包括具有多个多级存储单元的非易失性存储器结构，处理设备和控制器。 控制器被配置为将数据段的第一组连续位的第一部分映射到与多个多级存储器单元相关联的第一页，并且映射数据的第一组连续位的第二部分 分段到与多个多级存储器单元相关联的第二页。 第一页与第一重要性的位相关联，并且第二页与第二重要性的位相关联。

公开(公告)号：US08477444B1

公开(公告)日：2013-07-02

申请号：US12786242

申请日：2010-05-24

申请人： Qiyue Zou ,  Xueshi Yang ,  Gregory Burd

发明人： Qiyue Zou ,  Xueshi Yang ,  Gregory Burd

IPC分类号： G11B5/09 ,  G11B5/596

CPC分类号： G11B5/59627 ,  G11B5/59616 ,  G11B5/746

摘要： The present disclosure includes systems and techniques relating to control of magnetic recording devices, such as disk drives. Systems and techniques include generating timing data based on a clock signal and a waveform produced by a head operated with respect to a rotating recording medium and the clock signal, determining model parameters based on the timing data to model deterministic disturbances associated with the rotating recording medium, predicting a frequency offset by a model-based technique for the compensation of the deterministic disturbances between two servo wedges, predicting a frequency offset associated with one or more nondeterministic disturbances by a loop filter, determining a clock adjustment based on the predicted deterministic and nondeterministic frequency offsets, and adjusting a clock frequency to read or write data within the area.

摘要翻译： 本公开包括与磁记录装置（例如磁盘驱动器）的控制有关的系统和技术。 系统和技术包括基于时钟信号和由相对于旋转记录介质操作的磁头产生的波形产生定时数据和时钟信号，基于定时数据确定模型参数以建模与旋转记录介质相关联的确定性干扰 通过基于模型的技术预测用于补偿两个伺服楔之间的确定性干扰的频率偏移，通过环路滤波器预测与一个或多个非确定性干扰相关联的频率偏移，基于预测的确定性和非确定性确定时钟调整 频率偏移，以及调整时钟频率以读取或写入该区域内的数据。

公开(公告)号：US08407562B2

公开(公告)日：2013-03-26

申请号：US12872455

申请日：2010-08-31

申请人： Gregory Burd ,  Xueshi Yang

发明人： Gregory Burd ,  Xueshi Yang

IPC分类号： G11C29/00

CPC分类号： G06F12/0238 ,  G06F3/0608 ,  G06F3/0611 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/0623 ,  G06F3/064 ,  G06F3/0658 ,  G06F3/0679

摘要： A non-volatile semiconductor memory (NVSM) storage system includes a NVSM drive interface configured to receive host data sectors (HDSs) from a host interface. A buffer managing module is configured to store the HDSs in a buffer. A compression module is configured to compress the HDSs to generate compressed HDSs of different lengths. A drive data sector (DDS) generating module is configured to add nuisance data to the compressed HDSs to generate DDSs. The DDSs are stored in NVSM.

摘要翻译： 非易失性半导体存储器（NVSM）存储系统包括被配置为从主机接口接收主机数据扇区（HDS）的NVSM驱动器接口。 缓冲器管理模块被配置为将HDS存储在缓冲器中。 压缩模块被配置为压缩HDS以产生不同长度的压缩HDS。 驱动数据扇区（DDS）生成模块被配置为向压缩的HDS添加有害数据以产生DDS。 DDS存储在NVSM中。

公开(公告)号：US08397139B1

公开(公告)日：2013-03-12

申请号：US12643834

申请日：2009-12-21

申请人： Xueshi Yang ,  Gregory Burd

发明人： Xueshi Yang ,  Gregory Burd

IPC分类号： H03M13/00

CPC分类号： H03M13/13 ,  H03M13/19

摘要： A memory device having a plurality of nonvolatile memory cells for storing stored data where the stored data includes user stored data and nuisance stored data. A memory controller includes a transmitter for transmitting write data for storage as the stored data in the memory. The transmitter includes a selector for selection of user write data for storage as the user stored data in the memory and for selection of nuisance write data for storage as the nuisance stored data in the memory. The memory controller includes a receiver for receiving the stored data from the memory as read data where the read data includes the user stored data and the nuisance stored data. The receiver includes a Hamming weight detector for detecting the Hamming weights of read data received from the memory for distinguishing user stored data from nuisance stored data.

摘要翻译： 一种具有多个用于存储所存储数据的非易失性存储单元的存储器件，其中存储的数据包括用户存储的数据和令人不安的存储数据。 存储器控制器包括用于将用于存储的写入数据作为存储的数据发送到存储器中的发送器。 发射机包括一个选择器，用于选择存储用户写入数据，以便用户将数据存储在存储器中，并选择用于存储的烦扰写入数据作为存储器中的有害存储数据。 存储器控制器包括用于从存储器接收存储的数据作为读取数据的接收器，其中读取的数据包括用户存储的数据和令人讨厌的存储的数据。 接收机包括一个汉明权重检测器，用于检测从存储器接收的读取数据的汉明权重，用于区分用户存储的数据和有害存储数据。

公开(公告)号：US08363501B1

公开(公告)日：2013-01-29

申请号：US13099997

申请日：2011-05-03

申请人： Aditya Ramamoorthy ,  Gregory Burd ,  Xueshi Yang

发明人： Aditya Ramamoorthy ,  Gregory Burd ,  Xueshi Yang

IPC分类号： G11C7/02

CPC分类号： G11C7/02 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C11/5671 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0033 ,  G11C13/0069 ,  G11C29/00

摘要： A memory arrangement including a memory block and a controller. The memory block comprises a plurality of memory cells, wherein each memory cell operable to store one of a plurality of different levels of charge. The controller is configured to write (i) a first reference signal threshold into a first memory cell and (ii) a second reference signal threshold into a second memory cell. The first reference signal threshold corresponds to a first level of charge of the plurality of different levels of charge, and the second reference signal threshold corresponds to a second level of charge of the plurality of different levels of charge. Each of the first level of charge and the second level of charge is used to calibrate a read back of any of the one of the plurality of different levels of charge stored among the plurality of memory cells in the memory block.

公开(公告)号：US08327244B1

公开(公告)日：2012-12-04

申请号：US13274943

申请日：2011-10-17

申请人： Gregory Burd ,  Xueshi Yang

发明人： Gregory Burd ,  Xueshi Yang

IPC分类号： H03M13/03

CPC分类号： H03M13/251 ,  H03M13/256 ,  H04L1/0054 ,  H04L1/0058 ,  H04L1/006 ,  H04L25/03178 ,  H04L25/03197 ,  H04L25/067 ,  H04L2025/0342

摘要： Systems and methods for processing and decoding TCM/BCM-coded signal vectors. A multi-dimensional signal vector is received by, for example, a TCM or BCM decoder. The TCM/BCM decoder identifies the closest signal points in the signal constellation set, or “nearest neighbors,” for each dimension of the received signal vector. The TCM/BCM decoder then forms a test set that includes a plurality of multi-dimensional test vectors, where each dimension of each test vector is based on an identified nearest neighbor. In particular, each test point in the test set is based on a different combination of the nearest neighbors. The TCM/BCM decoder can compute branch metrics based on only the test points in the test set, and can make detection decisions using the computed branch metrics.

摘要翻译： 用于处理和解码TCM / BCM编码信号向量的系统和方法。 多维信号矢量由例如TCM或BCM解码器接收。 TCM / BCM解码器针对接收信号向量的每个维度识别信号星座集合中最接近的信号点或最近的邻居。 然后，TCM / BCM解码器形成包括多个多维测试向量的测试集，其中每个测试向量的每个维度基于所识别的最近邻。 特别地，测试集中的每个测试点基于最近邻的不同组合。 TCM / BCM解码器可以仅基于测试集中的测试点计算分支度量，并且可以使用计算的分支度量来进行检测决策。