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公开(公告)号:US11476347B2
公开(公告)日:2022-10-18
申请号:US17018793
申请日:2020-09-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Yao Lin , Kuei-Yu Kao , Chen-Ping Chen , Chih-Han Lin , Ming-Ching Chang , Chao-Cheng Chen
IPC: H01L29/40 , H01L29/66 , H01L29/78 , H01L21/3213 , H01L21/311
Abstract: A method includes forming a dummy gate electrode on a semiconductor region, forming a first gate spacer on a sidewall of the dummy gate electrode, and removing an upper portion of the first gate spacer to form a recess, wherein a lower portion of the first gate spacer remains, filling the recess with a second gate spacer, removing the dummy gate electrode to form a trench, and forming a replacement gate electrode in the trench.
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公开(公告)号:US20220238696A1
公开(公告)日:2022-07-28
申请号:US17722787
申请日:2022-04-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Yao Lin , Kuei-Yu Kao , Chih-Han Lin , Ming-Ching Chang , Chao-Cheng Chen
IPC: H01L29/66 , H01L21/8234 , H01L29/78 , H01L21/306
Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metal gate.
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公开(公告)号:US11289585B2
公开(公告)日:2022-03-29
申请号:US16889427
申请日:2020-06-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Yao Lin , Kuei-Yu Kao , Chen-Ping Chen , Chih-Han Lin , Ming-Ching Chang , Chao-Cheng Chen
Abstract: Semiconductor devices and methods of forming are described herein. The methods include depositing a dummy gate material layer over a fin etched into a substrate. A gate mask is then formed over the dummy gate material layer in a channel region of the fin. A dummy gate electrode is etched into the dummy gate material using the gate mask. A top spacer is then deposited over the gate mask and along sidewalls of a top portion of the dummy gate electrode. An opening is then etched through the remainder of the dummy gate material and through the fin. A bottom spacer is then formed along a sidewall of the opening and separates a bottom portion of the dummy gate electrode from the opening. A source/drain region is then formed in the opening and the dummy gate electrode is replaced with a metal gate stack.
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公开(公告)号:US20210313450A1
公开(公告)日:2021-10-07
申请号:US17345188
申请日:2021-06-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Han Lin , Ming-Ching Chang , Chao-Cheng Chen
IPC: H01L29/66 , H01L29/78 , H01L29/06 , H01L29/08 , H01L21/8234 , H01L29/417 , H01L29/423
Abstract: A semiconductor device includes a fin extending from a substrate, a gate stack over and along a sidewall of the fin, a spacer along a first sidewall of the gate stack and the sidewall of the fin, a dummy gate material along the sidewall of the fin, wherein the dummy gate material is between the spacer and the gate stack, and a first epitaxial source/drain region in the fin and adjacent the gate stack.
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公开(公告)号:US20210296484A1
公开(公告)日:2021-09-23
申请号:US17341075
申请日:2021-06-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chang-Yun Chang , Ming-Ching Chang , Shu-Yuan Ku
IPC: H01L29/78 , H01L21/762 , H01L21/8238 , H01L21/306 , H01L29/66 , H01L29/06 , H01L21/8234 , H01L27/092
Abstract: A first FinFET device includes first fin structures that extend in a first direction in a top view. A second FinFET device includes second fin structures that extend in the first direction in the top view. The first FinFET device and the second FinFET device are different types of FinFET devices. A plurality of gate structures extend in a second direction in the top view. The second direction is different from the first direction. Each of the gate structures partially wraps around the first fin structures and the second fin structures. A dielectric structure is disposed between the first FinFET device and the second FinFET device. The dielectric structure cuts each of the gate structures into a first segment for the first FinFET device and a second segment for the second FinFET device. The dielectric structure is located closer to the first FinFET device than to the second FinFET device.
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公开(公告)号:US20210242192A1
公开(公告)日:2021-08-05
申请号:US17218284
申请日:2021-03-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shiang-Bau Wang , Ryan Chia-Jen Chen , Shu-Yuan Ku , Ming-Ching Chang
IPC: H01L27/02 , H01L29/423 , H01L29/49 , H01L21/8234 , H01L21/311 , H01L21/762 , H01L27/088 , H01L21/3105 , H01L21/3213 , H01L29/06
Abstract: Methods for cutting (e.g., dividing) metal gate structures in semiconductor device structures are provided. A dual layer structure can form sub-metal gate structures in a replacement gate manufacturing processes, in some examples. In an example, a semiconductor device includes a plurality of metal gate structures disposed in an interlayer dielectric (ILD) layer disposed on a substrate, an isolation structure disposed between the metal gate structures, wherein the ILD layer circumscribes a perimeter of the isolation structure, and a dielectric structure disposed between the ILD layer and the isolation structure.
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公开(公告)号:US10535654B2
公开(公告)日:2020-01-14
申请号:US15904835
申请日:2018-02-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ya-Yi Tsai , Chun-Liang Lai , Shu-Yuan Ku , Ryan Chia-Jen Chen , Ming-Ching Chang
IPC: H01L27/088 , H01L27/02 , H01L29/423 , H01L29/06 , H01L21/8234 , H01L21/3213 , H01L29/66 , H01L21/8238 , H01L27/092 , H01L21/311 , H01L21/027 , H01L21/3105
Abstract: A semiconductor device includes a substrate, first and second fins protruding out of the substrate, and first and second high-k metal gates (HK MG) disposed over the first and second fins, respectively. From a top view, the first and second fins are arranged lengthwise along a first direction, the first and second HK MG are arranged lengthwise along a second direction generally perpendicular to the first direction, and the first and second HK MG are aligned along the second direction. In a cross-sectional view cut along the second direction, the first HK MG has a first sidewall that is slanted from top to bottom towards the second HK MG, and the second HK MG has a second sidewall that is slanted from top to bottom towards the first HK MG. Methods for producing the semiconductor device are also disclosed.
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公开(公告)号:US09590032B2
公开(公告)日:2017-03-07
申请号:US14569336
申请日:2014-12-12
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chih-Han Lin , Jr-Jung Lin , Ming-Ching Chang
CPC classification number: H01L29/0642 , H01L21/76224 , H01L29/66795 , H01L29/785
Abstract: A fin-like field-effect transistor (Fin-FET) device includes a substrate, a fin structure disposed on the substrate, and an isolation structure disposed adjacent to the fin structure. The fin structure includes a recessed structure, which a bottom of the recessed structure is below a top surface of the isolation structure.
Abstract translation: 鳍状场效应晶体管(Fin-FET)器件包括衬底,设置在衬底上的鳍结构以及邻近翅片结构设置的隔离结构。 翅片结构包括凹陷结构,凹陷结构的底部在隔离结构的顶表面下方。
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