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    True bit level decoding of TTCM (turbo trellis coded modulation) of variable rates and signal constellations
    72.
    发明授权
    True bit level decoding of TTCM (turbo trellis coded modulation) of variable rates and signal constellations 有权
    真正的比特级解码TTCM（turbo网格编码调制）的可变速率和信号星座

    公开(公告)号：US08473822B2

    公开(公告)日：2013-06-25

    申请号：US12627438

    申请日：2009-11-30

    申请人： Ba-Zhong Shen ,  Kelly Brian Cameron ,  Hau Thien Tran

    发明人： Ba-Zhong Shen ,  Kelly Brian Cameron ,  Hau Thien Tran

    IPC分类号： H03M13/45

    CPC分类号： H04L1/005 ,  H03M13/256 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2767 ,  H03M13/2771 ,  H03M13/2785 ,  H03M13/2957 ,  H03M13/4123 ,  H03M13/4161 ,  H04L1/0055 ,  H04L1/006 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

    摘要： True bit level decoding of TTCM (Turbo Trellis Coded Modulation) of variable rates and signal constellations. A decoding approach is presented that allows for decoding on a bit level basis that allows for discrimination of the individual bits of a symbol. Whereas prior art approaches typically perform decoding on a symbol level basis, this decoding approach allows for an improved approach in which the hard decisions/best estimates may be made individually for each of the individual bits of an information symbol. In addition, the decoding approach allows for a reduction in the total number of calculations that need to be performed as well as the total number of values that need to be stored during the iterative decoding. The bit level decoding approach is also able to decode a signal whose code rate and/or signal constellation type (and mapping) may vary on a symbol by symbol basis.

    摘要翻译： TTCM（Turbo Trellis编码调制）的可变速率和信号星座的真位解码。 提出了一种解码方法，其允许基于比特级的解码，其允许区分符号的各个比特。 而现有技术方法通常在符号级基础上执行解码，这种解码方法允许改进的方法，其中可以针对信息符号的各个比特分别进行硬判决/最佳估计。 此外，解码方法允许减少需要执行的计算的总数以及在迭代解码期间需要存储的值的总数。 比特级解码方法还能够解码其码率和/或信号星座类型（和映射）可以在逐个符号的基础上变化的信号。

    In-place transformations with applications to encoding and decoding various classes of codes
    73.
    发明授权
    In-place transformations with applications to encoding and decoding various classes of codes 有权
    与应用程序进行就地转换，对各种代码进行编码和解码

    公开(公告)号：US07644335B2

    公开(公告)日：2010-01-05

    申请号：US11423376

    申请日：2006-06-09

    申请人： Michael G. Luby ,  M. Amin Shokrollahi

    发明人： Michael G. Luby ,  M. Amin Shokrollahi

    IPC分类号： H03M13/05

    CPC分类号： H03M13/3761 ,  G06F17/16 ,  H03M13/05 ,  H03M13/1197 ,  H03M13/1515 ,  H03M13/2785 ,  H03M13/37 ,  H03M13/373 ,  H03M13/47 ,  H03M13/611 ,  H03M13/616 ,  H03M13/6505 ,  H03M13/6569 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0057

    摘要： In an encoder for encoding symbols of data using a computing device having memory constraints, a method of performing a transformation comprising loading a source block into memory of the computing device, performing an intermediate transformation of less than all of the source block, then replacing a part of the source block with intermediate results in the memory and then completing the transformation such that output symbols stored in the memory form a set of encoded symbols. A decoder can perform decoding steps in an order that allows for use of substantially the same memory for storing the received data and the decoded source block, performing as in-place transformations. Using an in-place transformation, a large portion of memory set aside for received data can be overwritten as that received data is transformed into decoded source data without requiring a similar sized large portion of memory for the decoded source data.

    摘要翻译： 在使用具有存储器限制的计算装置对数据符号进行编码的编码器中，执行变换的方法包括将源块加载到计算装置的存储器中，执行小于所有源块的中间变换， 具有中间的源块的一部分在存储器中产生，然后完成变换，使得存储在存储器中的输出符号形成一组编码符号。 解码器可以以允许使用基本上相同的存储器来存储接收的数据和解码的源块的顺序执行解码步骤，作为就地转换执行。 使用就地变换，可以覆盖用于接收数据的大部分存储器，因为接收的数据被转换为解码的源数据，而不需要用于解码的源数据的相似大小的大部分存储器。

    DE-INTERLEAVING MECHANISM INVOLVING A MULTI-BANKED LLR BUFFER
    74.
    发明申请
    DE-INTERLEAVING MECHANISM INVOLVING A MULTI-BANKED LLR BUFFER 有权
    涉及多银行LLR缓冲区的交互机制

    公开(公告)号：US20090249134A1

    公开(公告)日：2009-10-01

    申请号：US12404613

    申请日：2009-03-16

    申请人： Ali RostamPisheh ,  Raghu N. Challa ,  Iwen Yao ,  Davie J. Santos ,  Mrinal M. Nath

    发明人： Ali RostamPisheh ,  Raghu N. Challa ,  Iwen Yao ,  Davie J. Santos ,  Mrinal M. Nath

    IPC分类号： G11C29/00 ,  G06F12/02

    CPC分类号： H03M13/2785 ,  H03M13/2764 ,  H03M13/2771 ,  H03M13/2775 ,  H03M13/6566

    摘要： A de-interleaver generates a plurality of De-interleaved Reorder Physical (DRP) addresses to simultaneously write a corresponding plurality of LLR values into a multi-banked memory such that not more than one LLR value is written into each bank of the multi-banked memory at a time. A sequence of such parallel writes results in the LLR values of a transmission of a sub-packet being stored in the memory. Address translation performed during generation of the DRP addresses causes the LLR values to be stored within the banks such that a decoder can read LLR values out of the memory in a de-interleaved sequence. Each memory location of a bank is a word-location for storing multiple related LLR values, where one LLR value is stored along with its parity values. The ability to simultaneously write to multiple LLR values is used to clear locations in a fast and efficient manner.

    摘要翻译： 解交织器生成多个解交织重排物理（DRP）地址，以将对应的多个LLR值同时写入多存储存储器，使得不多于一个LLR值被写入多存储体的每个存储体 一次记忆 这种并行写入的序列导致存储在存储器中的子包的传输的LLR值。 在生成DRP地址期间执行的地址转换导致LLR值被存储在存储体中，使得解码器可以以解交织的顺序读出存储器中的LLR值。 存储体的每个存储器位置是用于存储多个相关LLR值的字位置，其中一个LLR值与其奇偶校验值一起存储。 用于同时写入多个LLR值的能力用于以快速有效的方式清除位置。

    Metric calculation design for variable code rate decoding of broadband trellis, TCM, or TTCM
    76.
    发明授权
    Metric calculation design for variable code rate decoding of broadband trellis, TCM, or TTCM 失效
    宽带网格，TCM或TTCM的可变码率解码的度量计算设计

    公开(公告)号：US07065695B2

    公开(公告)日：2006-06-20

    申请号：US10264647

    申请日：2002-10-04

    申请人： Kelly Brian Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran ,  Linda K. Lau

    发明人： Kelly Brian Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran ,  Linda K. Lau

    IPC分类号： H03M13/00

    CPC分类号： H04L1/005 ,  H03M13/256 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2767 ,  H03M13/2771 ,  H03M13/2785 ,  H03M13/2957 ,  H03M13/4123 ,  H03M13/4161 ,  H04L1/006 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

    摘要： Metric calculation design for variable code rate decoding of broadband trellis, TCM (trellis coded modulated), or TTCM (turbo trellis coded modulation). A single design can accommodate a large number of code rates by multiplexing the appropriate paths within the design. By controlling where to scale for any noise of a received symbol within a received signal, this adaptable design may be implemented in a manner that is very efficient in terms of performance, processing requirements (such as multipliers and gates), as well as real estate consumption. In supporting multiple code rates, appropriately selection of the coefficients of the various constellations employed, using the inherent redundancy and symmetry along the I and Q axes, can result in great savings of gates borrowing upon the inherent redundancy contained therein; in addition, no subtraction (but only summing) need be performed when capitalizing on this symmetry.

    摘要翻译： 宽带网格，TCM（网格编码调制）或TTCM（turbo网格编码调制）的可变码率解码的度量计算设计。 单一设计可以通过在设计中复用适当的路径来适应大量的代码率。 通过控制在接收信号中对接收到的符号的任何噪声进行缩放的位置，可以以在性能，处理要求（例如乘法器和门）等方面非常有效的方式来实现这种适应性设计，以及房地产 消费。 在支持多个码率的情况下，使用沿I和Q轴的固有冗余和对称性适当地选择所使用的各种星座的系数，可以大大节省借助于其中包含的固有冗余的门; 此外，当利用这种对称性时，不需要执行减法（但只有求和）。

    Memory control method for time deinterleaving in DMB receiver
    77.
    发明申请
    Memory control method for time deinterleaving in DMB receiver 审中-公开
    DMB接收机中时间解交织的存储器控​​制方法

    公开(公告)号：US20050226354A1

    公开(公告)日：2005-10-13

    申请号：US11100574

    申请日：2005-04-07

    申请人： Jong Shin ,  Ik-Seon Kang

    发明人： Jong Shin ,  Ik-Seon Kang

    IPC分类号： H04N7/015 ,  H04H40/18 ,  H04N3/27

    CPC分类号： H04H40/18 ,  H03M13/2732 ,  H03M13/276 ,  H03M13/2782 ,  H03M13/2785 ,  H04H20/426 ,  H04L1/0054 ,  H04L1/0071 ,  H04L27/2647

    摘要： Provided is a method for controlling a memory for time deinterleaving in a DMB receive by using byte addressing. The memory control method includes the steps of constructing the memory by the several segments so as to store only sample data used for actual time deinterleaving during a time period corresponding to M+1 frames from a time point r through a time point r+M; storing a plurality of sample data at one memory address by accessing the memory on a segment basis through byte addressing; and generating a byte-based memory address according to a time deinterleaving rule determined by the i value, and reading one of the sample data stored at the memory address and masking and another sample data stored at the memory address according to what order sample data is to be read from the memory address, thereby making it possible to greatly reduce the complexity of a memory address decoder in the memory.

    摘要翻译： 提供了一种通过使用字节寻址来控制DMB接收中的时间去交织的存储器的方法。 存储器控制方法包括以下步骤：通过若干段构造存储器，以便仅在从时间点r到时间点r + M的M + 1帧对应的时间段内仅存储用于实际时间去交织的采样数据; 通过字节寻址以段为基础访问存储器，将多个采样数据存储在一个存储器地址; 以及根据由i值确定的时间去交织规则生成基于字节的存储器地址，并且根据什么样的采样数据读取存储在存储器地址和屏蔽中的一个采样数据以及存储在存储器地址处的另一采样数据 从存储器地址读取，从而可以大大降低存储器中的存储器地址解码器的复杂度。

    Interleavers and de-interleavers
    79.
    发明授权
    Interleavers and de-interleavers 有权
    交织器和去交织器

    公开(公告)号：US06748561B2

    公开(公告)日：2004-06-08

    申请号：US10325495

    申请日：2002-12-20

    申请人： Mohit K. Prasad

    发明人： Mohit K. Prasad

    IPC分类号： G11C2900

    CPC分类号： H03M13/2785 ,  H03M13/2764

    摘要： A method and apparatus is provided for interleaving and de-interleaving frame symbols using a single memory buffer. Input frame symbols are read out in an interleaved sequence (or de-interleaved sequence) on a symbol by symbol basis. Frame symbols following the input frame symbols are written into memory locations from where the input frame symbols were read.

    摘要翻译： 提供了一种用于使用单个存储器缓冲器对帧符号进行交织和解交织的方法和装置。 以符号为单位的交错序列（或解交织序列）读出输入帧符号。 输入帧符号之后的帧符号被写入从其中读取输入帧符号的存储器位置。

    Interleavers and de-interleavers
    80.
    发明申请
    Interleavers and de-interleavers 有权
    交织器和去交织器

    公开(公告)号：US20030163776A1

    公开(公告)日：2003-08-28

    申请号：US10325495

    申请日：2002-12-20

    发明人： Mohit K. Prasad

    IPC分类号： G11C029/00 ,  H03M013/00

    CPC分类号： H03M13/2785 ,  H03M13/2764

    摘要： A method and apparatus is provided for interleaving and de-interleaving frame symbols using a single memory buffer. Input frame symbols are read out in an interleaved sequence (or de-interleaved sequence) on a symbol by symbol basis. Frame symbols following the input frame symbols are written into memory locations from where the input frame symbols were read.

    摘要翻译： 提供了一种用于使用单个存储器缓冲器对帧符号进行交织和解交织的方法和装置。 以符号为单位的交错序列（或解交织序列）读出输入帧符号。 输入帧符号之后的帧符号被写入从其中读取输入帧符号的存储器位置。