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81.发明授权公开(公告)号：US07062340B2
公开(公告)日：2006-06-13
申请号：US10397767
申请日：2003-03-26
IPC分类号： G06F17/00
CPC分类号： G10L19/038 , G10L19/008
摘要： A method of processing digital audio data includes receiving an input stream of audio data having a first quantization and a high oversampling rate. The input stream is requantized in a first processing block at the high oversampling rate to a second quantization. The requantized stream of audio data is processed in a second processing block at the high oversampling rate and the second quantization.
摘要翻译： 一种处理数字音频数据的方法包括接收具有第一量化和高过采样速率的音频数据的输入流。 将输入流以高过采样速率在第一处理块中重新量化为第二量化。 音频数据的再量化流以高过采样速率和第二量化在第二处理块中进行处理。
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82.发明授权Methods for output edge-balancing in pulse width modulation systems and data converters using the same 有权用于脉冲宽度调制系统中输出边沿平衡的方法和使用其的数据转换器公开(公告)号：US06965335B1
公开(公告)日：2005-11-15
申请号：US10765443
申请日：2004-01-27
CPC分类号： H03M7/3006 , H02M2003/1586 , H03M3/506 , H03M7/3015 , H03M7/3026 , H03M7/3037
摘要： A method of performing digital to analog conversion includes generating a pulse width modulated data stream and another pulse width modulated data stream, encoding patterns of the pulse width modulated data stream selected to minimize distortion in the another pulse width modulated stream caused by edges in the pulse width modulated data stream. The pulse width modulated data stream and the another pulse width modulated data stream are converted into an analog signal and another analog signal converting in corresponding digital to analog conversion elements and the analog signal and the another analog signal are summed to generate an analog output signal.
摘要翻译： 执行数模转换的方法包括生成脉冲宽度调制数据流和另一个脉宽调制数据流，编码脉宽调制数据流的模式，以选择最小化由脉冲中的边缘引起的另一个脉宽调制流中的失真 宽度调制数据流。 将脉冲宽度调制数据流和另一个脉冲宽度调制数据流转换成模拟信号，并在相应的数/模转换元件中转换另一个模拟信号，并将模拟信号和另一模拟信号相加以产生模拟输出信号。
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83.发明授权Circuits, Systems, and methods for volume in low noise 1-bit digital audio systems 有权低噪声1位数字音频系统中的音量，电路，系统和方法公开(公告)号：US06803869B1
公开(公告)日：2004-10-12
申请号：US10269582
申请日：2002-10-11
IPC分类号： H03M300
CPC分类号： G11B20/10527 , G11B2020/00065 , H03M7/3004
摘要： A data converter including a digital volume control for continuously scaling a received stream of digital audio data by a selected factor and a low noise delta-sigma modulator for re-quantizing a scaled digital data stream output from the digital volume control.
摘要翻译： 一种数据转换器，包括数字音量控制，用于通过所选择的因子连续缩放所接收的数字音频数据流，以及用于重新量化从数字音量控制输出的经缩放的数字数据流的低噪声Δ-Σ调制器。
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84.发明授权Circuits, systems and methods for volume control in 1-bit digital audio systems 有权1位数字音频系统中音量控制的电路，系统和方法公开(公告)号：US06784816B2
公开(公告)日：2004-08-31
申请号：US10334846
申请日：2002-12-30
IPC分类号： H03M300
CPC分类号： G11B20/10527 , G11B2020/00065 , H03M7/3004
摘要： A method of amplitude control in a 1-bit digital system includes the step of scaling the stream of 1-bit data by a scaling factor corresponding to a selected output amplitude. The scaled data is modulated and the resulting modulated, scaled data is converted from digital to analog form.
摘要翻译： 1位数字系统中的幅度控制方法包括按照与所选择的输出幅度对应的比例因子来缩放1位数据流的步骤。 经缩放的数据被调制，并且所得到的调制的，缩放的数据从数字模式转换成模拟形式。
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85.发明授权Delta-sigma modulation circuits and methods utilizing multiple noise attenuation bands and data converters using the same 有权使用多个噪声衰减频带的Δ-Σ调制电路和方法以及使用它们的数据转换器公开(公告)号：US06738003B2
公开(公告)日：2004-05-18
申请号：US10191016
申请日：2002-07-08
IPC分类号： H03M300
CPC分类号： H03M7/3006 , H03M7/3026 , H03M7/304
摘要： A noise shaper including a filter system for generating a first set of poles and zeros characterizing noise attenuation in a signal baseband of a noise transfer function and at least one additional set of at least one pole and one zero characterizing noise attenuation in at least one additional band outside the baseband of the noise transfer function.
摘要翻译： 一种噪声整形器，包括用于产生噪声传递函数的信号基带中表征噪声衰减的第一组极点和零点的滤波器系统以及至少一个附加的至少一个极点和一个零表征噪声衰减的至少一个附加集合 频带外的基带噪声传递功能。
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86.发明授权Circuits systems and methods for power digital-to-analog converter protection 有权用于电源数模转换器保护的电路系统和方法公开(公告)号：US06522273B1
公开(公告)日：2003-02-18
申请号：US09825091
申请日：2001-04-02
申请人： Xiaofan Fei , Johann Guy Gaboriau , Jason Powell Rhode , John Laurence Melanson , Eric Walburger
发明人： Xiaofan Fei , Johann Guy Gaboriau , Jason Powell Rhode , John Laurence Melanson , Eric Walburger
IPC分类号： H03M116
CPC分类号： H03M1/0604 , H03M1/822 , H03M3/506 , H03M3/51
摘要： An apparatus and method for power digital-to-analog converter protection are implemented. An attenuation value is set in response to the value of the supply voltage. The attenuation value is provided to a gain control, along with the input signal. A gain, offset by the attenuation value, determines the gain-adjusted output signal of the gain control generated from the input signal.
摘要翻译： 实现了功率数模转换器保护的装置和方法。 响应于电源电压的值设置衰减值。 衰减值与输入信号一起提供给增益控制。 通过衰减值偏移的增益确定从输入信号产生的增益控制的增益调整输出信号。
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87.发明授权Methods and apparatus for correction of higher order delta sigma converters 有权用于校正高阶delta-Σ转换器的方法和装置公开(公告)号：US06480129B1
公开(公告)日：2002-11-12
申请号：US09510034
申请日：2000-02-22
IPC分类号： H03M300
CPC分类号： H03M7/3013 , H03M3/358 , H03M3/388 , H03M3/506 , H03M7/3026 , H03M7/3033 , H03M7/304
摘要： A technique for correcting higher order delta sigma modulators in audio components, which use mutually nonlinear feedback and feed forward functions. Methods and apparatus are provided to correct jitter and spread in the delta sigma converter due to quantization error, to permit the processing of data streams entering the converter at a different clock rate from that of the modulator, and to permit step up ratios to be changed on the fly in order to reduce radio frequency interference from the output signal.
摘要翻译： 用于校正音频组件中的高阶ΔΣ调制器的技术，其使用相互非线性反馈和前馈功能。 提供了用于校正由于量化误差在Δ-Σ转换器中的抖动和扩展的方法和装置，以允许以与调制器不同的时钟速率进入转换器的数据流的处理，并且允许升压比被改变 在飞行中为了减少射频干扰从输出信号。
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88.发明授权Multilevel analog to digital data converter having dynamic element matching in a reference data path 有权在参考数据路径中具有动态元素匹配的多级模数转换器公开(公告)号：US06346898B1
公开(公告)日：2002-02-12
申请号：US09633381
申请日：2000-08-07
IPC分类号： H03M160
CPC分类号： H03M1/0668 , H03M1/361 , H03M3/424 , H03M3/458
摘要： In a delta sigma analog to digital converter, generally comprising a noise shaping filter element fed into a multilevel quantizer, the output of which is the output of the delta sigma modulator and is also fed through a digital to analog converter array in a feedback loop to the noise shaping filter, dynamic element matching circuitry is included in the quantizer, in a reference path. The quantizer includes dynamic element matching circuitry for shaping the usage of the elements of the quantizer. Specifically, reference voltages are switched to specific comparators according to control signals from switch control circuitry.
摘要翻译： 在ΔΣ模数转换器中，通常包括馈送到多电平量化器中的噪声整形滤波器元件，其输出是Δ-Σ调制器的输出，并且还通过反馈回路中的数模转换器阵列馈送到 噪声整形滤波器，动态元件匹配电路被包括在量化器中，在参考路径中。 量化器包括用于整形量化器的元件的使用的动态元件匹配电路。 具体地，根据来自开关控制电路的控制信号，将参考电压切换到特定的比较器。
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89.发明授权Digital to analog conversion circuits and methods utilizing single-bit delta-SIGMA modulators and multiple-bit digital to analog converters 失效使用单位delta-SIGMA调制器和多位数模转换器的数模转换电路和方法公开(公告)号：US06340940B1
公开(公告)日：2002-01-22
申请号：US09618370
申请日：2000-07-18
IPC分类号： H03M301
摘要： A digital to analog converter re-codes a stream of 1-bit digital data into a stream of multiple-bit data with a gain greater than one. The resulting stream of multiple-bit data is then converted into analog form in a multiple-bit digital to analog converter. By applying a gain of greater than one to the 1-digital data stream the higher modulation index available in the multiple-bit can be exploited.
摘要翻译： 数模转换器将1比特数字数据流重新编码为具有大于1的增益的多比特数据流。 所得到的多位数据流在多位数模转换器中被转换成模拟形式。 通过对1数字数据流应用大于1的增益，可以利用在多位中可用的较高调制指数。
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公开(公告)号：US06294954B1
公开(公告)日：2001-09-25
申请号：US09480274
申请日：2000-01-11
IPC分类号： H03F338
CPC分类号： H03F1/32 , H03F3/2171 , H03K5/1515 , H03K19/0013 , H03K19/018585
摘要： Apparatus for adaptively reducing dead time in a switching circuit includes overlap detection circuitry for measuring the dead time/overlap of the switches, and control circuitry for setting the dead time to the optimum level (generally the minimum possible dead time without any overlap occurring). The dead time/overlap may be detected by measuring the current through the switches, the current into the power supply, the voltage waveform at the switch point, or the average voltage waveform at the switch point. The dead time may be controlled by utilizing delay elements prior to the drivers, or by utilizing circuitry to control the driver timing.
摘要翻译： 用于自适应地减少开关电路中的死区时间的装置包括用于测量开关的死区时间/重叠的重叠检测电路和用于将死区时间设置为最佳电平的控制电路（通常是没有发生任何重叠的最小可能死区时间）。 可以通过测量通过开关的电流，电流的电流，开关点的电压波形或开关点的平均电压波形来检测死区时间/重叠。 死区时间可以通过在驱动器之前利用延迟元件来控制，或者通过利用电路来控制驱动器时序。
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