Amplifier circuit and methods of operation thereof

    公开(公告)号:US10587187B2

    公开(公告)日:2020-03-10

    申请号:US15597900

    申请日:2017-05-17

    Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

    AMPLIFIER CIRCUIT AND METHODS OF OPERATION THEREOF

    公开(公告)号:US20170250601A1

    公开(公告)日:2017-08-31

    申请号:US15597900

    申请日:2017-05-17

    Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

    CHARGE PUMP CIRCUIT
    83.
    发明申请

    公开(公告)号:US20170250600A1

    公开(公告)日:2017-08-31

    申请号:US15597850

    申请日:2017-05-17

    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.

    Driver circuitry
    85.
    发明授权

    公开(公告)号:US12167696B2

    公开(公告)日:2024-12-10

    申请号:US18410837

    申请日:2024-01-11

    Abstract: The present disclosure relates to circuitry for driving a piezoelectric transducer to generate an audio output. The circuitry comprises pre-processor circuitry configured to process an input audio signal to generate a processed signal; driver circuitry coupled to the pre-processor circuitry and configured to generate a drive signal, based on the processed signal, for driving the piezoelectric transducer; and processor circuitry configured to determine a resonant frequency of the piezoelectric transducer. The pre-processor circuitry is configured to process the input audio signal based on the determined resonant frequency so as to generate the processed signal.

    Amplifiers
    86.
    发明授权

    公开(公告)号:US11817833B2

    公开(公告)日:2023-11-14

    申请号:US17583614

    申请日:2022-01-25

    Inventor: John P. Lesso

    CPC classification number: H03F3/2173 H03F2200/03 H03F2200/102 H03F2200/504

    Abstract: This application relates to an amplifier selectively operable in first or second modes. The first mode is a BTL mode with first and second output drivers (103p, 103n) both active to generate respective driving signals that vary with an input signal. The second mode is an SE mode, where the first output driver (103p) is active to generate a driving signal at and the output of the second driver (103n) is held constant. A controller (201) selectively controls the mode based on an indication of output signal amplitude. In the first mode, a ratio of magnitude of the two driving signals varies with the indication of output signal amplitude, i.e. the magnitudes of the two driving signals may vary so as to be not equal.

    Authentication device
    87.
    发明授权

    公开(公告)号:US11721346B2

    公开(公告)日:2023-08-08

    申请号:US16897815

    申请日:2020-06-10

    Inventor: John P. Lesso

    CPC classification number: G10L17/22 H04L9/0643 H04L9/3268

    Abstract: A method of authenticating a speech signal in a first device comprises receiving a speech signal, and performing a live speech detection process to determine whether the received signal represents live speech. The live speech detection process generates a live speech detection output. A certificate is formed by encrypting at least the live speech detection output. The received signal, and the certificate, are transmitted to a separate second device.

    Clock generator
    88.
    发明授权

    公开(公告)号:US11711086B2

    公开(公告)日:2023-07-25

    申请号:US17468085

    申请日:2021-09-07

    Inventor: John P. Lesso

    Abstract: A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an output clock signal and the first clock signal, and a first error signal represents the difference between the desired frequency ratio and this comparison result. The first error signal is filtered. A comparison is made between frequencies of the output clock signal and the second clock signal, and a second error signal represents the difference between the filtered first error signal and this comparison result. The second error signal is filtered. A numerically controlled oscillator receives the filtered second error signal and generates an output clock signal. As a result, the output clock signal has the jitter characteristics of the first input clock signal over a useful range of jitter frequencies and the frequency accuracy of the second input clock signal.

    Voltage regulators
    89.
    发明授权

    公开(公告)号:US11687107B2

    公开(公告)日:2023-06-27

    申请号:US17092569

    申请日:2020-11-09

    CPC classification number: G05F1/575

    Abstract: This application relates to voltage regulators and, particular, to low-dropout regulators (LDOs). The regulator (300) has an output stage (102) which receives an input voltage (Vin) and outputs an output voltage (Vout) and which includes at least one transistor (103) as an output device configured to pass an output current to the output, based on a drive voltage (V1). A differential amplifier (101) is configured to receive a feedback signal derived from the output voltage and also a reference voltage (REF) to generate an amplifier output to control the drive voltage (V1) to minimise any difference between the feedback signal and the reference voltage. A controller (301) is operable to selectively reconfigure the output stage to provide a change in output current in response to a load activity signal (ACT), which is indicative of a change in load activity that results in a change in load current demand for a load connected, in use, to the output.

    Microphone system
    90.
    发明授权

    公开(公告)号:US11627414B2

    公开(公告)日:2023-04-11

    申请号:US17710152

    申请日:2022-03-31

    Abstract: A microphone system, comprises a first transducer, for generating a first acoustic signal, and a second transducer, for generating a second acoustic signal. A high-pass filter receives the first signal and generates a first filtered signal, and a low-pass filter receives the second signal and generates a second filtered signal. An adder forms an output signal of the microphone system as a sum of the first filtered signal and the second filtered signal.

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