公开(公告)号：US20100130011A1

公开(公告)日：2010-05-27

申请号：US12623556

申请日：2009-11-23

申请人： TETSUO ENDOH ,  Eiichi Nishimura

发明人： TETSUO ENDOH ,  Eiichi Nishimura

IPC分类号： H01L21/308 ,  H01L21/302

CPC分类号： H01L21/3086 ,  H01L21/3088 ,  H01L29/66181 ,  H01L29/66787 ,  H01L29/66795

摘要： According to a disclosed semiconductor device fabrication method according to one embodiment of the present invention, a layer having a line-and-space pattern extending in one direction is etched using another layer having a line-and-space pattern extending in another direction intersecting the one direction, thereby obtaining a mask having two-dimensionally arranged dots. An underlying layer is etched using the mask, thereby providing two-dimensionally arranged pillars.

摘要翻译： 根据本发明的一个实施例公开的半导体器件制造方法，使用具有在与另一方向相交的另一个方向上延伸的线间距图案的另一层蚀刻具有沿一个方向延伸的线间距图案的层 从而获得具有二维排列的点的掩模。 使用掩模蚀刻下层，由此提供二维布置的柱。

公开(公告)号：US07700494B2

公开(公告)日：2010-04-20

申请号：US11024747

申请日：2004-12-30

申请人： Vaidyanathan Balasubramaniam ,  Masaaki Hagihara ,  Eiichi Nishimura ,  Koichiro Inazawa ,  Rie Inazawa, legal representative

发明人： Vaidyanathan Balasubramaniam ,  Masaaki Hagihara ,  Eiichi Nishimura ,  Koichiro Inazawa

IPC分类号： H01L21/302

CPC分类号： H01L21/31138 ,  G03F7/427 ,  H01L21/02063

摘要： A method is provided for low-pressure plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.

摘要翻译： 提供了一种用于低压等离子体灰化以去除光刻胶残余物和蚀刻在电介质层的先前等离子体蚀刻期间形成的残留物的方法。 灰化方法使用包含含氧气体的两步等离子体工艺，其中在第一清洁步骤中向衬底施加低或零偏压，以除去蚀刻之外的大量光致抗蚀剂残余物和蚀刻残留物 并从室表面除去有害的氟碳残余物。 在第二清洗步骤中对衬底施加增加的偏压以除去光刻胶的残余物并从衬底上蚀刻残留物。 在第二清洗步骤中使用小于20mTorr的室压力。 两步法减少了常规一步灰化过程中常见的记忆效应。 端点检测方法可用于监测灰化过程。

公开(公告)号：US20090087990A1

公开(公告)日：2009-04-02

申请号：US12284749

申请日：2008-09-24

申请人： Koichi Yatsuda ,  Eiichi Nishimura

发明人： Koichi Yatsuda ,  Eiichi Nishimura

IPC分类号： H01L21/311

CPC分类号： H01L21/32139 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144

摘要： A manufacturing method of a semiconductor device, which etches a layer to be etched on a substrate into a predetermined pattern based on a first pattern of photoresist produced by exposing and developing a photoresist film, the manufacturing method including the steps of forming an SiO2 film on a first pattern of the photoresist, etching the SiO2 film so that the SiO2 may remain only in a side wall section of a first pattern of the photoresist, removing a first pattern of the photoresist, and forming a second pattern of the SiO2 film.

摘要翻译： 一种半导体器件的制造方法，其基于通过曝光和显影光致抗蚀剂膜产生的光致抗蚀剂的第一图案将基板上待蚀刻的层蚀刻成预定图案，所述制造方法包括以下步骤：在 光刻胶的第一图案，蚀刻SiO 2膜，使SiO 2仅保留在光致抗蚀剂的第一图案的侧壁部分中，去除光致抗蚀剂的第一图案，并形成SiO 2膜的第二图案。

公开(公告)号：US20090081565A1

公开(公告)日：2009-03-26

申请号：US12234032

申请日：2008-09-19

申请人： Koichi Yatsuda ,  Eiichi Nishimura

发明人： Koichi Yatsuda ,  Eiichi Nishimura

IPC分类号： H01L21/02 ,  G03F1/00

CPC分类号： H01L21/32139

摘要： Disclosed is a method for forming an etching mask, capable of precisely and easily forming an etching mask having a microscopic pattern of a non-straight-line shape. An exposure pattern of a straight-line shape is transferred to a photoresist by using a first reticle and developed, and after a trimming process, a SiO2 layer is etched by using it as a mask. Thereafter, an exposure pattern of a straight-line shape is transferred to a photoresist by using a second reticle and developed, and then, a protruding amount of an end portion of the photoresist protruding from the SiO2 layer is measured. Subsequently, the pattern of the photoresist is trimmed to have a preset thickness and length, and by forming the protruding amount to have a preset amount or less, and by using this as a mask, a Si3N4 layer is etched, thereby forming an etching mask having an approximately L-shape.

摘要翻译： 公开了一种形成蚀刻掩模的方法，其能够精确且容易地形成具有非直线形状的微观图案的蚀刻掩模。 通过使用第一掩模版将直线形状的曝光图案转印到光致抗蚀剂中并显影，并且在修整工艺之后，通过使用其作为掩模来蚀刻SiO 2层。 此后，通过使用第二掩模版将直线形状的曝光图案转印到光致抗蚀剂并显影，然后测量从SiO 2层突出的光致抗蚀剂的端部的突出量。 随后，将光致抗蚀剂的图案修剪成具有预设的厚度和长度，并且通过将突出量形成为预定量或更小的量，并且通过将其用作掩模，蚀刻Si 3 N 4层，从而形成蚀刻掩模 具有大致L形。

公开(公告)号：US20090014125A1

公开(公告)日：2009-01-15

申请号：US12141395

申请日：2008-06-18

申请人： Tsuyoshi SHIBATA ,  Eiichi Nishimura

发明人： Tsuyoshi SHIBATA ,  Eiichi Nishimura

IPC分类号： H01L21/306 ,  G06F19/00

CPC分类号： H01L21/67184 ,  H01L21/31144 ,  H01L21/67178 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

摘要： A substrate processing system includes a resist pattern forming apparatus including modules each configured to perform a predetermined process on a substrate with an underlying film formed thereon, an etched pattern forming apparatus including chambers each configured to perform patterning of the underlying film by use of a resist pattern as a mask, and examination devices configured to perform measurement and examination of a pattern attribute rendered on a substrate after a process in the resist pattern forming apparatus and after a process in the etched pattern forming apparatus. A controller is preset to utilize measurement results and transfer data to calculate correction value ranges respectively settable in the modules and the chambers and to determine combinations of the modules and the chambers such that corrections made within the correction value ranges cause a pattern attribute to approximate a predetermined value for each of the substrates.

摘要翻译： 衬底处理系统包括抗蚀剂图案形成设备，其包括各自被配置为在其上形成有底层膜的衬底上执行预定处理的模块，蚀刻图案形成设备包括各自被构造成通过使用抗蚀剂来执行底层膜的图案化的腔室 图案作为掩模，以及检查装置，被配置为在抗蚀剂图案形成装置中的处理之后和蚀刻图案形成装置中的处理之后，对在基板上呈现的图案属性进行测量和检查。 预设控制器以利用测量结果和传送数据来计算分别可设置在模块和室中的校正值范围，并且确定模块和室的组合，使得在校正值范围内进行的校正导致模式属性近似于 每个基板的预定值。

公开(公告)号：US07169440B2

公开(公告)日：2007-01-30

申请号：US10259768

申请日：2002-09-30

申请人： Vaidyanathan Balasubramaniam ,  Masaaki Hagiwara ,  Eiichi Nishimura ,  Kouichiro Inazawa

发明人： Vaidyanathan Balasubramaniam ,  Masaaki Hagiwara ,  Eiichi Nishimura ,  Kouichiro Inazawa

IPC分类号： B05D5/06

CPC分类号： H01L21/02063 ,  G03F7/427 ,  H01L21/31138

摘要： A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.

摘要翻译： 提供了一种用于等离子体灰化以去除光刻胶残留物的蚀刻残留物和蚀刻在电介质层的先前等离子体蚀刻期间形成的残留物的方法。 灰化方法使用包含含氧气体的两步等离子体工艺，其中在第一清洁步骤中向衬底施加低或零偏压，以除去蚀刻之外的大量光致抗蚀剂残余物和蚀刻残留物 并从室表面除去有害的氟碳残余物。 在第二清洗步骤中对衬底施加增加的偏压以除去光刻胶的残余物并从衬底上蚀刻残留物。 两步法减少了常规一步灰化过程中常见的记忆效应。 端点检测方法可用于监测灰化过程。

公开(公告)号：US5741552A

公开(公告)日：1998-04-21

申请号：US666738

申请日：1996-06-20

申请人： Hideki Takayama ,  Eiichi Nishimura

发明人： Hideki Takayama ,  Eiichi Nishimura

IPC分类号： B05D7/00 ,  C09D183/05 ,  C09D183/08 ,  B05D7/16 ,  B05D1/36 ,  B05D3/02

CPC分类号： B05D7/52 ,  C09D183/08

摘要： A multi-layer coating comprising a base coat and a topcoat is formed on an article such as a chemically-treated steel plate by coating the article with a base coat composition containing (a) a cross-linking agent which does not interfere with the hydrosilylation reaction of a topcoat composition, and (b) a functional resin reactable with the cross-linking agent, and then with a topcoat composition containing (c) (i) a blend of a hydrosilyl group-containing compound and an alkenyl group-containing compound, and/or (ii) a self-crosslinkable resin, and (d) a catalytic amount of a hydrosilylation catalyst, followed by separate or simultaneous baking. The topcoat composition may contain functional groups (phosphoric groups and/or alkoxysilyl groups) or a functional group-containing compound.

摘要翻译： 通过用含有（a）不影响氢化硅烷化反应的交联剂的底涂层组合物涂覆制品，在诸如化学处理钢板的制品上形成包含底涂层和面涂层的多层涂层 面漆组合物的反应，和（b）与交联剂反应的功能性树脂，然后与含有（c）（i）含氢化甲硅烷基化合物和含烯基的化合物的共混物的面漆组合物 ，和/或（ii）自交联树脂，和（d）催化量的氢化硅烷化催化剂，然后分开或同时烘烤。 面漆组合物可以含有官能团（磷酸基和/或烷氧基甲硅烷基）或含官能团的化合物。

公开(公告)号：US5465223A

公开(公告)日：1995-11-07

申请号：US256113

申请日：1994-06-24

申请人： Eiichi Nishimura

发明人： Eiichi Nishimura

IPC分类号： G06F5/01 ,  G06F7/00

CPC分类号： G06F5/015

摘要： A left shift tri-state buffer and a right shift tri-state buffer are provided in each of a plurality of barrel-shifter unit circuits which constitute a barrel-shifter, wherein a left or right shift control signal supplied to a left and right shift input terminal enables either of them. As a result, the left or right shift control signal switches between data transfer route from an input terminal to the input end i/o terminal and that from the input terminal to the output end i/o terminal so as to set a left shift or a right shift. It is also possible to shift input data by desired bits which are set by supplying address signals to address terminals to set the shifting amount.

摘要翻译： PCT No.PCT / JP93 / 00025 Sec。 371日期：1994年6月24日 102（e）1994年6月24日PCT 1993年1月11日PCT PCT。 出版物WO93 / 19456 日期：1993年7月22日。在构成桶形移位器的多个桶形移位单元电路中的每一个中提供左移三态缓冲器和右移三态缓冲器，其中左移或右移位控制信号 提供给左右移位输入端子使得它们中的任何一个。 结果，左移或右移位控制信号在从输入端到输入端i / o端的数据传输路径和从输入端到输出端i / o端的数据传输路径之间切换，以便设定左移或 右转 也可以通过向地址端子提供地址信号而设定的期望位来输入数据，以设定移位量。

公开(公告)号：US5147493A

公开(公告)日：1992-09-15

申请号：US714231

申请日：1991-06-12

申请人： Eiichi Nishimura ,  Akihito Toda ,  Kazuhiko Sugiyama ,  Yukio Naitou

发明人： Eiichi Nishimura ,  Akihito Toda ,  Kazuhiko Sugiyama ,  Yukio Naitou

IPC分类号： C23F4/00 ,  H01J37/32 ,  H01L21/302 ,  H01L21/3065

CPC分类号： H01J37/32174 ,  H01J37/32082 ,  H01J37/32165 ,  H01J2237/3347 ,  H01J2237/3348

摘要： A plasma generating apparatus comprising a transformer including a primary winding connected to a high frequency power source and a secondary winding having two end terminals and a plurality of tap terminals connected between the end terminals, the transformer being adapted to deliver first and second high frequency electric powers with a phase difference of 180.degree. from the end terminals, upper and lower electrodes disposed in a vacuum chamber so as to be opposed at a distance from each other and supplied with the first and second high frequency powers, respectively, and a power ratio selector for switching the tap terminals to select the ratio between the first and second high frequency powers supplied to the electrodes, wherein a to-be-processed object placed on the lower electrode is processed by means of plasma formed between the electrodes.

摘要翻译： 一种等离子体发生装置，包括变压器，其包括连接到高频电源的初级绕组和具有两个端子端子的次级绕组和连接在端子端子之间的多个抽头端子，所述变压器适于将第一和第二高频电力 与终端相位差为180°的功率，上下电极设置在真空室中，以便彼此相隔一定距离并分别提供第一和第二高频功率，功率比 选择器，用于切换抽头端子以选择提供给电极的第一和第二高频功率之间的比率，其中通过在电极之间形成的等离子体来处理放置在下电极上的被处理物体。

公开(公告)号：US5060301A

公开(公告)日：1991-10-22

申请号：US561949

申请日：1990-08-02

申请人： Eiichi Nishimura

发明人： Eiichi Nishimura

IPC分类号： G02B6/00 ,  G02B27/28 ,  G02F1/35 ,  H04B10/2507 ,  H04B10/29 ,  H04B10/293

CPC分类号： H04B10/2572 ,  H04B10/2935

摘要： In a system of optical repeated transmission having a signal transmission path for transmitting signal light, and an optical repeater disposed in the signal transmission path, and directly amplifying the signal light, the amplification factor of the repeater is not dependent on the direction of polarization of the signal light that is input to it.