Semiconductor wafer handling and transport

    公开(公告)号:US09862554B2

    公开(公告)日:2018-01-09

    申请号:US14353153

    申请日:2012-10-26

    发明人: Robert T. Caveney

    摘要: A substrate processing system including at least two vertically stacked transport chambers, each of the vertically stacked transport chambers including a plurality of openings arranged to form vertical stacks of openings configured for coupling to vertically stacked process modules, at least one of the vertically stacked transport chambers includes at least one transport chamber module arranged for coupling to another transport chamber module to form a linear transport chamber and another of the at least two stacked transport chambers including at least one transport chamber module arranged for coupling to another transport chamber module to form another linear transport chamber, and a transport robot disposed in each of the transport chamber modules, where a joint of the transport robot is locationally fixed along a linear path formed by the respective linear transport chamber.