PROGRAMMING AND SELECTIVELY ERASING NON-VOLATILE STORAGE
    82.
    发明申请
    PROGRAMMING AND SELECTIVELY ERASING NON-VOLATILE STORAGE 有权
    编程和选择性擦除非易失性存储

    公开(公告)号:US20110261621A1

    公开(公告)日:2011-10-27

    申请号:US13168855

    申请日:2011-06-24

    IPC分类号: G11C16/16 G11C16/04

    摘要: A non-volatile storage system performs programming for a plurality of non-volatile storage elements and selectively performs re-erasing of at least a subset of the non-volatile storage elements that were supposed to remain erased, without intentionally erasing programmed data.

    摘要翻译: 非易失性存储系统对多个非易失性存储元件执行编程,并且有选择地执行应该保持擦除的非易失性存储元件的至少一个子集的重新擦除,而无需有意地擦除编程数据。

    Segmented bitscan for verification of programming
    84.
    发明授权
    Segmented bitscan for verification of programming 有权
    分段位扫描用于验证编程

    公开(公告)号:US07924625B2

    公开(公告)日:2011-04-12

    申请号:US12755610

    申请日:2010-04-07

    IPC分类号: G11C16/04

    摘要: A set non-volatile storage elements are subjected to a programming process in order to store a set of data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target condition to store the appropriate data. Decisions about whether to continue programming or whether the programming is successful are made based on whether overlapping groups of the non-volatile storage elements have less than a threshold number of non-volatile storage elements that are not properly programmed.

    摘要翻译: 一组非易失性存储元件经受编程处理以便存储一组数据。 在编程过程中,执行一个或多个验证操作以确定非易失性存储元件是否已经达到其目标条件以存储适当的数据。 关于是继续编程还是编程成功的决定是基于非易失性存储元件的重叠组是否具有小于非正确编程的非易失性存储元件的阈值数量来进行。

    Non-volatile memory using multiple boosting modes for reduced program disturb
    87.
    发明授权
    Non-volatile memory using multiple boosting modes for reduced program disturb 有权
    使用多种升压模式的非易失性存储器可减少程序干扰

    公开(公告)号:US07796430B2

    公开(公告)日:2010-09-14

    申请号:US12211348

    申请日:2008-09-16

    IPC分类号: G11C16/04

    CPC分类号: G11C16/3418

    摘要: A non-volatile storage system which reduces program disturb. Multiple boosting modes are implemented while programming non-volatile storage. For example, self-boosting, local self-boosting, erased area self-boosting and revised erased area self-boosting may be used. One or more switching criteria are used to determine when to switch to a different boosting mode. The boosting mode may be used to prevent program disturb in unselected NAND strings while storage elements are being programmed in selected NAND strings. By switching boosting modes, an optimal boosting mode can be used as conditions change. The boosting mode can be switched based on various criteria such as program pulse number, program pulse amplitude, program pass number, the position of a selected word line, whether coarse or fine programming is used, whether a storage element reaches a program condition and/or a number of program cycles of the non-volatile storage device.

    摘要翻译: 一种减少程序干扰的非易失性存储系统。 在编程非易失性存储时实现多种升压模式。 例如,可以使用自我增强,局部自我增强,消除区域自增强和修改的擦除区域自增强。 使用一个或多个切换标准来确定何时切换到不同的升压模式。 当存储元件被编程在所选择的NAND串中时,升压模式可用于防止未选择的NAND串中的程序干扰。 通过切换升压模式,可以在条件变化时使用最佳升压模式。 可以基于各种标准来切换升压模式,例如程序脉冲数,程序脉冲幅度,程序通过次数,所选字线的位置,是使用粗调还是精细编程,存储元件是否达到程序状态和/ 或非易失性存储设备的多个程序周期。

    Non-volatile storage with early source-side boosting for reducing program disturb
    88.
    发明授权
    Non-volatile storage with early source-side boosting for reducing program disturb 有权
    具有早期源极增压的非易失性存储器,用于减少程序干扰

    公开(公告)号:US07623387B2

    公开(公告)日:2009-11-24

    申请号:US11609813

    申请日:2006-12-12

    IPC分类号: G11C16/04

    摘要: Non-volatile storage with reduced program disturb is provided by boosting unselected NAND strings in an array so that a source side channel, on a source side of a selected word line, is boosted before a drain side channel, on a drain side of the selected word line. In one approach, a first boost mode is used when the selected word line is a lower or intermediate word line. In the first boost mode, boosting of the source and drain side channels is initiated concurrently. A second boost mode is used when the selected word line is a higher word line. In the second boost mode, boosting of the source side channel occurs early relative to the boosting of the drain side channel. Either boost mode include an isolation voltage which tends to isolate the source and drain side channels from one another.

    摘要翻译: 通过将阵列中未选择的NAND串升压来提供具有减少的编程干扰的非易失性存储器,使得在所选择的字线的源极侧上的源极通道在所选择的漏极侧的漏极侧之前被提升在漏极侧通道之前 字线。 在一种方法中,当所选字线是较低或中间字线时,使用第一升压模式。 在第一升压模式中,同时启动源极和漏极侧通道的升压。 当所选字线是较高字线时,使用第二升压模式。 在第二升压模式中,源极侧沟道的升压相对于漏极侧沟道的升压而早期发生。 升压模式包括易于将源极和漏极侧通道彼此隔离的隔离电压。

    Self-aligned non-volatile memory cell
    89.
    发明授权
    Self-aligned non-volatile memory cell 有权
    自对准非易失性存储单元

    公开(公告)号:US07504686B2

    公开(公告)日:2009-03-17

    申请号:US11469727

    申请日:2006-09-01

    IPC分类号: H01L29/76

    摘要: Floating gate structures are disclosed that have a projection that extends away from the surface of a substrate. This projection may provide the floating gate with increased surface area for coupling the floating gate and the control gate. In one embodiment, the word line extends downwards on each side of the floating gate to shield adjacent floating gates in the same string. In another embodiment, a process for fabricating floating gates with projections is disclosed. The projection may be formed so that it is self-aligned to the rest of the floating gate.

    摘要翻译: 公开了浮动栅极结构,其具有远离衬底的表面延伸的突起。 该突起可以为浮动栅极提供增加的表面积,用于耦合浮动栅极和控制栅极。 在一个实施例中,字线在浮动栅极的每一侧向下延伸以屏蔽相同串中的相邻浮动栅极。 在另一个实施例中,公开了一种用于制造具有突起的浮动栅极的工艺。 突起可以形成为使得其与浮动栅极的其余部分自对准。

    Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data
    90.
    发明授权
    Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data 有权
    用于通过消除对字线数据的预充电依赖来减少编程干扰的非易失性存储器编程系统

    公开(公告)号:US07468918B2

    公开(公告)日:2008-12-23

    申请号:US11618594

    申请日:2006-12-29

    IPC分类号: G11C16/06

    摘要: Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line. Prior to applying a program voltage to the selected word line and boosting the unselected groups, the unselected groups are pre-charged to further reduce or eliminate program disturb by providing a larger boosted potential for the unselected groups. During pre-charging, one or more pre-charge enable signals are provided at higher voltages for certain memory cells that may have undergone partial programming.

    摘要翻译: 在编程期间,未选择的非易失性存储元件组被提升以减少或消除连接到所选字线的目标但未选择的存储器单元的程序干扰。 在将程序电压施加到所选择的字线并升高未选择的组之前,未选择的组被预先充电,以通过为未选择的组提供更大的增强电位来进一步减少或消除程序干扰。 在预充电期间,对于可能已经经过部分编程的某些存储器单元,在较高电压下提供一个或多个预充电使能信号。