公开(公告)号：US07446750B2

公开(公告)日：2008-11-04

申请号：US10849946

申请日：2004-05-21

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： H05B41/2822 ,  G02F1/133604 ,  H05B41/2824 ,  Y02B20/186

摘要： An inverter is provided, which includes: a voltage converter that converts a DC voltage from an external device into an AC voltage to drive at least a lamp and includes a primary coil and first and second secondary coils connected in series; a current sensor that senses at least a current flowing in the first or second secondary coil and generate at least a sensing signal based on the sensed at least a current; a feedback signal generator that generates a feedback signal based on the at least a sensing signal from the current sensor; and a controller that controls the voltage converter based on the feedback signal such that a tube current flowing in the at least a lamp keeps substantially constant.

摘要翻译： 提供了一种逆变器，其包括：电压转换器，其将来自外部设备的直流电压转换为交流电压以驱动至少一个灯，并且包括初级线圈和串联连接的第一和第二次级线圈; 感测至少在第一或第二次级线圈中流动的电流并且基于所感测的至少一个电流产生至少一个感测信号的电流传感器; 反馈信号发生器，其基于来自所述电流传感器的所述至少一个感测信号产生反馈信号; 以及控制器，其基于所述反馈信号来控制所述电压转换器，使得在所述至少一个灯中流动的管电流保持基本恒定。

公开(公告)号：US20080106542A1

公开(公告)日：2008-05-08

申请号：US11934658

申请日：2007-11-02

申请人： Dong-Won PARK ,  Myeong-Su Kim ,  Seung-Hwan Moon

发明人： Dong-Won PARK ,  Myeong-Su Kim ,  Seung-Hwan Moon

IPC分类号： G09G5/00

CPC分类号： G09G5/008 ,  G09G3/36

摘要： A display apparatus that can conserve power without compromising general display quality is presented. In a display system including a main control apparatus and a display apparatus, the main control apparatus generates an image control signal having an image data, and a main clock signal that changes from a first frequency to a second frequency in response to a change in image mode from a first image mode to a second image mode. The change from the first frequency to the second frequency includes changing through at least one intermediate frequency stage between the first frequency and the second frequency. By maintaining the change of frequency shift small (i.e., less than a predetermined maximum change), operation in emergency mode is avoided even when the frequency shift is sudden. The display apparatus receives the image control signal and the main clock signal to display an image.

摘要翻译： 提出了一种在不损害一般显示质量的情况下节省功率的显示装置。 在包括主控制装置和显示装置的显示系统中，主控制装置产生具有图像数据的图像控制信号和响应于图像变化从第一频率变化到第二频率的主时钟信号 模式从第一图像模式到第二图像模式。 从第一频率到第二频率的变化包括在第一频率和第二频率之间改变至少一个中频级。 通过保持频移的变化小（即，小于预定的最大变化），即使当频移突然时也避免了紧急模式下的操作。 显示装置接收图像控制信号和主时钟信号以显示图像。

公开(公告)号：US20080036717A1

公开(公告)日：2008-02-14

申请号：US11874524

申请日：2007-10-18

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2330/08

摘要： Disclosed is an LCD apparatus having improved display characteristics. A clock generator applies first and second clock signals to a gate driver so as to control a pulse width of a gate driving signal. A discharging transistor connected to first ends of gate lines discharges a present stage before operating a next stage. The gate lines include a first gate driver and a second gate driver for operating the gate lines while the first gate driver is operated in an abnormal state. Accordingly, the LCD apparatus may be operated in high-speed and prevent the gate driving signal from being delayed.

摘要翻译： 公开了具有改进的显示特性的LCD装置。 时钟发生器将第一和第二时钟信号施加到栅极驱动器，以便控制栅极驱动信号的脉冲宽度。 连接到栅极线的第一端的放电晶体管在操作下一级之前对现在放电。 栅极线包括用于在第一栅极驱动器处于异常状态的同时操作栅极线的第一栅极驱动器和第二栅极驱动器。 因此，LCD装置可以高速运转，防止门驱动信号延迟。

公开(公告)号：US20080012816A1

公开(公告)日：2008-01-17

申请号：US11052584

申请日：2005-02-07

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36 ,  G11C19/28

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G11C19/28

摘要： A shift register is provided, which includes: a plurality of stages sequentially outputting gate signals, each stage including: an input unit outputting a control signal based on an external signal; an output unit connected to the input unit and outputting a gate signal based on a first clock signal and the control signal; and a signal generating unit connected to the output unit and generating a transmission signal based on the first clock signal and the control signal.

摘要翻译： 提供了一种移位寄存器，其包括：多级顺序地输出门信号，每级包括：输入单元，其基于外部信号输出控制信号; 输出单元，连接到输入单元，并基于第一时钟信号和控制信号输出门信号; 以及信号生成单元，连接到所述输出单元，并且基于所述第一时钟信号和所述控制信号生成发送信号。

公开(公告)号：US07317779B2

公开(公告)日：2008-01-08

申请号：US10771797

申请日：2004-02-04

申请人： Seung-Hwan Moon ,  Nam-Soo Kang ,  Kyung-Eun Lee ,  Back-Won Lee ,  Ji-Hoon Kim

发明人： Seung-Hwan Moon ,  Nam-Soo Kang ,  Kyung-Eun Lee ,  Back-Won Lee ,  Ji-Hoon Kim

IPC分类号： G11C19/00

CPC分类号： G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

摘要： A shift register has multiple stages each of which includes a pull-up part to generate a current gate line driving signal having a first state in response to a first control signal and a clock signal, a pull-down part to generate the current gate line driving signal having a second state in response to a second control signal, a pull-up driver to generate the first control signal to control the pull-up part in response to a previous gate line driving signal provided from a previous stage, a following gate line driving signal provided from a following stage, and an input voltage signal externally provided, and a pull-down driver to generate the second control signal to control the pull-down part in response to a third control signal provided from the pull-up driver and the input voltage signal, in which the second control signal swings between first and second voltage levels in association with the input voltage signal that swings between predetermined voltage levels.

摘要翻译： 移位寄存器具有多个级，其中每一级包括上拉部分，用于响应于第一控制信号和时钟信号产生具有第一状态的电流栅极线驱动信号，产生电流栅极线的下拉部分 响应于第二控制信号具有第二状态的驱动信号;上拉驱动器，用于响应于从先前级提供的先前的栅极线驱动信号产生第一控制信号以控制上拉部分;跟随门 从后级提供的线路驱动信号和外部提供的输入电压信号，以及下拉驱动器，以产生第二控制信号，以响应于从上拉驱动器提供的第三控制信号来控制下拉部分 以及输入电压信号，其中第二控制信号与在预定电压电平之间摆动的输入电压信号相关联的第一和第二电压电平之间摆动。

公开(公告)号：US20070070018A1

公开(公告)日：2007-03-29

申请号：US11508601

申请日：2006-08-22

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G09G3/2055 ,  G09G3/2011 ,  G09G3/2077 ,  G09G3/3648

摘要： A liquid crystal display with improved color reproducibility and image quality is presented. The liquid crystal display includes a liquid crystal panel assembly including a plurality of pixels, a signal controller, and a data driver. The signal controller stores a dithering data patterns, selects one of the dithering data patterns based on input image data having a first bit number, and converts the input image data to output image data having a different bit number using the selected dithering data pattern. The data driver applies data voltages to the pixels, the data voltages corresponding to the output image data from the signal controller. Frequency of the input image signal and the output image signal from the signal controller is each about 120 Hz, and the dithering data patterns are repeated every eight frames. The signal controller includes a look-up table that stores the dithering data patterns.

摘要翻译： 提出了具有改进的颜色再现性和图像质量的液晶显示器。 液晶显示器包括包括多个像素的液晶面板组件，信号控制器和数据驱动器。 信号控制器存储抖动数据模式，基于具有第一位数的输入图像数据选择抖动数据模式之一，并且使用所选择的抖动数据模式将输入图像数据转换为具有不同位数的输出图像数据。 数据驱动器将数据电压施加到像素，数据电压对应于来自信号控制器的输出图像数据。 来自信号控制器的输入图像信号和输出图像信号的频率大约为120Hz，并且抖动数据模式每8帧重复一次。 信号控制器包括存储抖动数据模式的查找表。

公开(公告)号：US20060274006A1

公开(公告)日：2006-12-07

申请号：US11487779

申请日：2006-07-17

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G2360/144

摘要： A liquid crystal display (“LCD”) having a plurality of gray voltages with varying magnitudes and a driving method thereof. An LCD includes a reference voltage generator changing level of a supply voltage based on a first signal to generate a reference voltage. The first signal varies depending on the surrounding brightness of the LCD, the brightness of the on-screen images of the LCD, and user's manipulation. The LCD also includes a gray voltage generator generating a plurality of gray voltages with magnitudes varying dependent on the magnitude of the reference voltage and a predetermined voltage such as a ground voltage. The LCD further includes a plurality of gate lines transmitting a plurality of gate signals, a plurality of data lines transmitting the gray voltages, and a plurality of pixels. Each pixel has a switching element connected to one of the gate lines and one of the data lines and transmitting the gray voltages to the pixels under the control of the gate signal. The LCD includes a gate driver supplying the gate signals to the gate lines and a data driver selecting the gray voltages based on gray data from an external source to supply to the pixels via the data lines.

公开(公告)号：US20060208984A1

公开(公告)日：2006-09-21

申请号：US11273190

申请日：2005-11-14

申请人： Sang-Soo Kim ,  Dong-Gyu Kim ,  Seung-Hwan Moon ,  Seung-Woo Lee ,  Seung-Soo Baek

发明人： Sang-Soo Kim ,  Dong-Gyu Kim ,  Seung-Hwan Moon ,  Seung-Woo Lee ,  Seung-Soo Baek

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G02F2001/134345 ,  G09G3/2074 ,  G09G3/3406 ,  G09G3/3614 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0823 ,  G09G2310/0251 ,  G09G2310/0281 ,  G09G2320/0209 ,  G09G2320/0247 ,  G09G2320/028 ,  G09G2320/064

摘要： A display device according to an embodiment of the present invention includes: a pixel including a first subpixel and a second subpixel; a first signal line connected to the first subpixel and transmitting a first signal; a second signal line connected to the second subpixel and transmitting a second signal; a third signal line intersecting the first and the second signal lines, connected to at least one of the first and the second subpixels, and transmitting a third signal; and a fourth signal line intersecting the first and the second signal lines and transmitting a fourth signal, wherein the first subpixel and the second subpixel are supplied with data voltages having different magnitude, and the data voltages applied to the first and the second subpixels are originated from a single image information.

公开(公告)号：US07084840B2

公开(公告)日：2006-08-01

申请号：US09970992

申请日：2001-10-05

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/3674 ,  G09G3/3685

摘要： Disclosed is a liquid crystal display device in which printed circuit board (PCB) modules are suitably arranged to form a large screen with high resolution. The liquid crystal display device includes first and second main PCBs for driving a dual bank type liquid crystal panel, the first main PCB having a timing controller for processing external odd input signals to generate driving signals, and sending part of the driving signals to a corresponding source driver PCB, so as to generate video signals to be supplied to the odd pixels of the liquid crystal panel; and the second main PCB having a timing controller for processing external even input signals to generate driving signals, and sending part of the driving signals to a corresponding source driver PCB, so as to generate video signals to be supplied to the even pixels of the liquid crystal panel. According to the present invention, two source driver PCBs are used to supply video data to the upper part and the lower part of the liquid crystal panel, respectively, and thereby to reduce signal delay and distortion in driving the dual bank type liquid crystal display device for a large screen with high resolution, thus solving the problems of coupling between signals more deviating from the tolerance range with an increased frequency, noise, and EMI.

公开(公告)号：US20060061562A1

公开(公告)日：2006-03-23

申请号：US11230112

申请日：2005-09-19

申请人： Haeng-Won Park ,  Seung-Hwan Moon ,  Nam-Soo Kang ,  Sung-Jae Moon ,  Sung-Man Kim ,  Seong-Young Lee ,  Yong-Soon Lee

发明人： Haeng-Won Park ,  Seung-Hwan Moon ,  Nam-Soo Kang ,  Sung-Jae Moon ,  Sung-Man Kim ,  Seong-Young Lee ,  Yong-Soon Lee

IPC分类号： G09G5/00

CPC分类号： G09G3/3677 ,  G09G2300/0426 ,  G11C19/184

摘要： A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.

摘要翻译： 门驱动器包括多个阶段。 每个级具有电路部分和布线部分。 布线部分将第一和第二时钟信号传送到电路部分。 此外，布线部分包括分别接收第一和第二时钟信号的第一和第二时钟布线，第一连接布线将第一时钟布线与第一个每隔一个电路电连接，第二连接布线将第二时钟布线与奇数 无数阶段 此外，布线部分包括将第一连接布线与第二布线电连接的第三连接布线和将第二连接布线与偶数段电连接的第四连接布线。 该配置可以防止栅极驱动器错误地操作并且减小栅极驱动器消耗的功率。