摘要:
A display apparatus that can conserve power without compromising general display quality is presented. In a display system including a main control apparatus and a display apparatus, the main control apparatus generates an image control signal having an image data, and a main clock signal that changes from a first frequency to a second frequency in response to a change in image mode from a first image mode to a second image mode. The change from the first frequency to the second frequency includes changing through at least one intermediate frequency stage between the first frequency and the second frequency. By maintaining the change of frequency shift small (i.e., less than a predetermined maximum change), operation in emergency mode is avoided even when the frequency shift is sudden. The display apparatus receives the image control signal and the main clock signal to display an image.
摘要:
A method and apparatus capable of reducing or preventing dithering noises in 3D dither for displaying stereoscopic or 3D images are provided. The method entails generating image data in which two consecutive frames have the same dithered image data.
摘要:
A method and apparatus capable of reducing or preventing dithering noises in 3D dither for displaying stereoscopic or 3D images are provided. The method entails generating image data in which two consecutive frames have the same dithered image data.
摘要:
An LCD device having a backlight generates a backlight brightness control signal in response to a duty rate signal corresponding to an average gray level or/and a color state of image data to be displayed on the LCD device and a brightness control voltage generated from the main body of the computer by user, and controls a brightness of the backlight automatically according to the backlight brightness control signal.
摘要:
A gate driving circuit includes a shift register and a vertical start line. The shift register includes first to N-th circuit stages sequentially providing first to N-th gate-on signals to first to N-th gate lines, respectively, at least one reverse dummy stage adjacent to the first circuit stage and at least one forward dummy stage adjacent to the N-th circuit stage (N is a natural number). The vertical start line is electrically connected to the first circuit stage or the N-th circuit stage according to a scan direction and transfers a vertical start signal to the first or N-th circuit stage.
摘要:
A display device for improving display quality includes a pulse compensator, a gate driver, a source driver and a display panel. The pulse compensator generates a clock signal of which amplitude decreases when peripheral temperature increases and increases when peripheral temperature decreases. The gate driver outputs a gate driving signal to the display panel based on the clock signal, wherein an amplitude of the gate driving signal decreases when the peripheral temperature increases and the amplitude of the gate driving signal increases when the peripheral temperature decreases. The source driver provides a gray-scale voltage based on gray-scale data, and the display panel displays an image corresponding to the gray-scale voltage in response to the gate driving signal. Therefore, the deterioration in the drive capability of the gate driver depending on the peripheral temperature may be prevented and display quality of the display device may be improved.
摘要:
A method of driving a display panel includes generating a gate on voltage, a first gate off voltage and a second gate off voltage. A clock signal is generated based upon the gate on voltage and the second gate off voltage. A first panel gate off voltage substantially the same as the first gate off voltage and a second panel gate off voltage substantially the same as the second gate off voltage are generated in a first operating mode. A first panel gate off voltage greater than the first gate off voltage and a second panel gate off voltage greater than the second gate off voltage are generated in a second operating mode. A gate signal is generated based upon the clock signal and the first and second panel gate off voltages to a gate line of the display panel.
摘要:
A gate driving circuit includes a shift register and a vertical start line. The shift register includes first to N-th circuit stages sequentially providing first to N-th gate-on signals to first to N-th gate lines, respectively, at least one reverse dummy stage adjacent to the first circuit stage and at least one forward dummy stage adjacent to the N-th circuit stage (N is a natural number). The vertical start line is electrically connected to the first circuit stage or the N-th circuit stage according to a scan direction and transfers a vertical start signal to the first or N-th circuit stage.
摘要:
A liquid crystal display apparatus includes a liquid crystal panel assembly having pixels arranged in a matrix form, which have a first group of pixels and a second group of pixels, gate lines having a first group of gate lines and a second group of gate lines that are connected with the first group of pixels and the second group of pixels, respectively, and data lines each of which is connected with one of the first group of pixels and one of the second group of pixels in every row of the matrix form. The liquid crystal display apparatus also includes a signal controller that receives input image signals and generates two groups of image data, a data driver that receives the two groups of image data and provides data voltages corresponding to the image data to the data lines, and a gate driving unit including a first gate driver that provides first gate-on signals to the first group of gate lines and a second gate driver that provides second gate-on signals to the second group of gate lines.
摘要:
A display device with reduced power consumption has pixels coupled with data lines and arranged in a matrix, a signal controller processing input image signals and outputting output image signals, and a data driver applying data voltages, corresponding to output image signals, to the data lines. When all the input image signals have either a first or second value, the output image signals have the first value. The signal controller generates a polarity signal for determining data voltage polarity, and when all the input image signals have either a first or second value, data voltages corresponding to the input image signals have a polarity equivalent to a polarity of previously applied data voltages. The signal controller generates a control signal for controlling the data driver's clock synchronization circuit, and the control signal halts the clock synchronization circuit when an operating frequency is lower than a predetermined value.