公开(公告)号：US20250093905A1

公开(公告)日：2025-03-20

申请号：US18470452

申请日：2023-09-20

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Wojciech Wasko ,  Dotan David Levi ,  Natan Manevich ,  Maciej Machnikowski

IPC: G06F1/12 ,  G06F13/42 ,  H04L7/033

Abstract: In one embodiment, a peripheral device includes an oscillator, a counter to be driven by the oscillator and provide a peripheral device counter value, and processing circuitry to receive a host device counter value from a host device, read host device clock translation parameters from a host memory of the host device, the host device clock translation parameters providing translation between the host device counter value and a host device clock time, read peripheral device clock translation parameters providing a translation between the peripheral device counter value and a peripheral device clock time, read the peripheral device counter value, compute a clock correction as a function of a difference between the host device clock time and the peripheral clock time, based on the host device and peripheral device counter values and clock translation parameters, and correct the host device or peripheral device clock translation parameters based on the clock correction.

公开(公告)号：US12255734B2

公开(公告)日：2025-03-18

申请号：US17973575

申请日：2022-10-26

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Wojciech Wasko ,  Dotan David Levi ,  Avi Urman ,  Natan Manevich

IPC: H04J3/06

Abstract: In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.

公开(公告)号：US12229072B2

公开(公告)日：2025-02-18

申请号：US18598382

申请日：2024-03-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Dotan David Levi ,  Eyal Srebro ,  Eliel Peretz ,  Roee Moyal ,  Richard Graham ,  Gil Bloch ,  Sean Pieper

IPC: G06F13/42 ,  G06F7/76

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.

公开(公告)号：US20250056006A1

公开(公告)日：2025-02-13

申请号：US18230877

申请日：2023-08-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Yury Shvartzman ,  Eyal Frishman ,  Dror Porat ,  Eshed Ram ,  Ohad Markus ,  Limor Martin

IPC: H04N19/147 ,  H04N19/14 ,  H04N19/172 ,  H04N19/176

Abstract: Systems and methods herein are for a video encoder to be associated with an interface that is to receive, from an application, at least one metric that is associated with a quality preference for video compression to be performed by the video encoder and that is to provide a weight map to enable the video encoder to perform rate-distortion optimization (RDO) for received frames from the application using the weight map to weigh one or more first blocks associated with an individual one of the frames more than one or more second blocks associated with the individual one of the frames.

公开(公告)号：US20250021130A1

公开(公告)日：2025-01-16

申请号：US18349976

申请日：2023-07-11

Applicant: Mellanox Technologies, Ltd.

Inventor： Natan Manevich ,  Dotan David Levi ,  Wojciech Wasko ,  Maciej Machnikowski

IPC: G06F1/12

Abstract: In one embodiment, a system including a reference processing device includes a reference hardware clock to maintain a reference clock value, and reference clock synchronization circuitry to discipline the reference hardware clock responsively to a remote clock, which is remote to the system, and a follower processing device including a follower hardware clock to maintain a follower clock value, and follower clock synchronization circuitry to synchronize the follower hardware clock to the reference hardware clock, and provide an indication about the follower clock value to the reference processing device, wherein the reference clock synchronization circuitry is configured to monitor a quality of the synchronization of the follower hardware clock to the reference hardware clock.

公开(公告)号：US12177325B2

公开(公告)日：2024-12-24

申请号：US18523991

申请日：2023-11-30

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Ariel Shahar ,  Shahaf Shuler ,  Ariel Almog ,  Eitan Hirshberg ,  Natan Manevich

IPC: H04L7/00

Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.

公开(公告)号：US12079029B2

公开(公告)日：2024-09-03

申请号：US17313026

申请日：2021-05-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Itai Levy ,  Dotan David Levi ,  Nir Nitzani ,  Natan Manevich ,  Alex Vaynman ,  Ariel Almog

IPC: G06F1/12 ,  G06F13/20 ,  H04L7/00

CPC classification number: G06F1/12 ,  G06F13/20 ,  H04L7/0012

Abstract: A network adapter includes a network port for communicating with a communication network, a hardware clock, and circuitry. The circuitry is coupled to receive from the communication network, via the network port, one or more time-protocol packets that convey a network time used for synchronizing network devices in the communication network, to align the hardware clock to the network time conveyed in the time-protocol packets, and to make the network time available to one or more time-service consumers running in a host served by the network adapter.

公开(公告)号：US20240281292A1

公开(公告)日：2024-08-22

申请号：US18110788

申请日：2023-02-16

Applicant: Mellanox Technologies, Ltd.

Inventor： Natan Manevich ,  Dotan David Levi ,  Wojciech Wasko ,  Shay Aisman ,  Ariel Almog ,  Eliel Peretz ,  Igor Voks

IPC: G06F9/50

CPC classification number: G06F9/5038 ,  G06F9/505

Abstract: A device includes a transceiver coupled to a processing device. The processing device is to determine a first time for executing an operation associated with a work execution agent of a plurality of work execution agent. The processing device is further to receive a latency measurement associated with the work execution agent responsive to transmitting the request. The latency measurement is calculated after executing a previous operation associated with the work execution agent at the device. The processing device is also to modify the first time to a second time for executing the operation responsive to receiving the latency measurement.

公开(公告)号：US12058309B2

公开(公告)日：2024-08-06

申请号：US16291023

申请日：2019-03-04

Applicant: Mellanox Technologies, Ltd.

Inventor： Dotan David Levi ,  Assaf Weissman ,  Kobi Pines ,  Noam Bloch ,  Erez Yaacov ,  Ariel Naftali Cohen

IPC: H04N19/105 ,  H04N19/139 ,  H04N19/147 ,  H04N19/176

CPC classification number: H04N19/105 ,  H04N19/139 ,  H04N19/176 ,  H04N19/147

Abstract: A system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each the block of the second plurality of blocks, to produce a score of result blocks based on similarity of each the block in each frame to be encoded to every block of the reference frame, and a displacement vector. Related apparatus and methods are also provided.

公开(公告)号：US20240244227A1

公开(公告)日：2024-07-18

申请号：US18096424

申请日：2023-01-12

Applicant: Mellanox Technologies, Ltd.

Inventor： Eshed Ram ,  Dotan David Levi ,  Assaf Hallak ,  Shie Mannor ,  Gal Chechik ,  Eyal Frishman ,  Ohad Markus ,  Dror Porat ,  Assaf Weissman

IPC: H04N19/149 ,  H04N19/154 ,  H04N19/172

CPC classification number: H04N19/149 ,  H04N19/154 ,  H04N19/172

Abstract: A system includes a processing device to receive a video content, a quality metric, and a target bit rate for encoding the video content. The system includes encoding hardware to perform frame encoding on the video content and a controller coupled between the processing device and the encoding hardware. The controller is programmed with machine instructions to generate first QP values on a per-frame basis using a frame machine learning model with a first plurality of weights. The first plurality of weights depends at least in part on the quality metric and the target bit rate. The controller is further programmed to provide the first QP values to the encoding hardware for rate control of the frame encoding.