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    ADAPTIVE CACHE PROMOTIONS IN A TWO LEVEL CACHING SYSTEM
    81.
    发明申请
    ADAPTIVE CACHE PROMOTIONS IN A TWO LEVEL CACHING SYSTEM 有权
    自适应高速缓存在两级缓存系统中的推广

    公开(公告)号：US20130232294A1

    公开(公告)日：2013-09-05

    申请号：US13412412

    申请日：2012-03-05

    申请人： Michael T. Benhase ,  Stephen L. Blinick ,  Evangelos S. Eleftheriou ,  Lokesh M. Gupta ,  Robert Haas ,  Xiao-Yu Hu ,  Ioannis Koltsidas ,  Roman A. Pletka

    发明人： Michael T. Benhase ,  Stephen L. Blinick ,  Evangelos S. Eleftheriou ,  Lokesh M. Gupta ,  Robert Haas ,  Xiao-Yu Hu ,  Ioannis Koltsidas ,  Roman A. Pletka

    IPC分类号： G06F12/08

    CPC分类号： G06F12/128 ,  G06F12/126

    摘要： Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache.

    摘要翻译： 提供了一种用于管理第一高速缓存和第二高速缓存中的数据的计算机程序产品，系统和方法。 当页面存储在第二高速缓存中时，对于页面的第二高速缓存中维护引用计数。 确定页面将被从第二缓存提升到第一高速缓存。 响应于确定参考计数大于零，该页被添加到第一高速缓存中的LRU列表的最近最少使用（LRU）末端。 响应于确定参考计数小于或等于零，该页被添加到第一高速缓存中的LRU列表的最近使用（LRU）端。

    Solid-state storage system with parallel access of multiple flash/PCM devices
    82.
    发明授权
    Solid-state storage system with parallel access of multiple flash/PCM devices 有权
    具有并行访问多个闪存/ PCM设备的固态存储系统

    公开(公告)号：US08495471B2

    公开(公告)日：2013-07-23

    申请号：US12627364

    申请日：2009-11-30

    申请人： Theodore A. Antonakopoulos ,  Roy D. Cideciyan ,  Evangelos S. Eleftheriou ,  Robert Haas ,  Xiao-Yu Hu ,  Ilias Iliadis

    发明人： Theodore A. Antonakopoulos ,  Roy D. Cideciyan ,  Evangelos S. Eleftheriou ,  Robert Haas ,  Xiao-Yu Hu ,  Ilias Iliadis

    IPC分类号： G11C29/00

    CPC分类号： G06F11/1028 ,  G11C29/765

    摘要： Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.

    摘要翻译： 提供了通过使用容错架构以及用于随机/突发错误校正的一个纠错码（ECC）机制来解决固态驱动器（SSD）中的故障存储集成电路（IC）的问题的系统和方法，以及 L折叠交织机制。 当一个或多个集成电路出现故障并且允许从故障集成电路恢复先前存储的数据并且允许在其他操作集成电路中校正随机/突发错误时，本文描述的系统和方法保持SSD的可操作性。 这些系统和方法用作为备用集成电路处理的全功能/可操作集成电路来代替故障集成电路。 此外，这些系统和方法在最大可实现的读/写数据速率方面提高了I / O性能。

    WEAR-LEVEL OF CELLS/PAGES/SUB-PAGES/BLOCKS OF A MEMORY
    83.
    发明申请
    WEAR-LEVEL OF CELLS/PAGES/SUB-PAGES/BLOCKS OF A MEMORY 有权
    细胞/页/子页面/记忆体的层数

    公开(公告)号：US20130166827A1

    公开(公告)日：2013-06-27

    申请号：US13700545

    申请日：2011-06-06

    申请人： Roy D. Cideciyan ,  Evangelos S. Eleftheriou ,  Robert Haas ,  Xiao-Yu Hu ,  Ilias Iliadis ,  Roman Pletka

    发明人： Roy D. Cideciyan ,  Evangelos S. Eleftheriou ,  Robert Haas ,  Xiao-Yu Hu ,  Ilias Iliadis ,  Roman Pletka

    IPC分类号： G06F12/02

    CPC分类号： G06F12/0246 ,  G06F2212/7211 ,  G11C16/3495

    摘要： The invention is directed to a method for wear-leveling cells or pages or sub-pages or blocks of a memory such as a flash memory, the method comprising:—receiving (S10) a chunk of data to be written on a cell or page or sub-page or block of the memory;—counting (S40) in the received chunk of data the number of times a given type of binary data ‘0’ or ‘I’ is to be written; and—distributing (S50) the writing of the received chunk of data amongst cells or pages or sub-pages or blocks of the memory such as to wear-level the memory with respect to the number of the given type of binary data ‘0’ or ‘I’ counted in the chunk of data to be written.

    摘要翻译： 本发明涉及一种用于对诸如闪速存储器的存储器的单元格或页面或子页面或块进行磨损均衡的方法，所述方法包括： - 接收（S10）要写入单元或页面的数据块 或存储器的子页面或块; - 在接收的数据块中记录给定类型的二进制数据“0”或“I”的次数（S40）; （S50）在存储器的单元格或页面或子页面或块之间写入所接收的数据块，以便相对于给定类型的二进制数据“0”的数量对存储器进行磨损级别 或者“我”在要写入的数据块中计数。

    ELECTRICAL POWER SUPPLY UNIT AND METHOD FOR CHARGING ACCUMULATORS OF AN ELECTRIC POWER SUPPLY UNIT AND LIGHT ELECTRIC VEHICLE WITH ELECTRIC POWER SUPPLY UNIT
    87.
    发明申请
    ELECTRICAL POWER SUPPLY UNIT AND METHOD FOR CHARGING ACCUMULATORS OF AN ELECTRIC POWER SUPPLY UNIT AND LIGHT ELECTRIC VEHICLE WITH ELECTRIC POWER SUPPLY UNIT 审中-公开
    电力供应单元和用于向电力供应单元充电电力单元和轻型电动车辆的蓄电池的充电方法

    公开(公告)号：US20110155494A1

    公开(公告)日：2011-06-30

    申请号：US12992896

    申请日：2009-05-13

    申请人： Robert Haas

    发明人： Robert Haas

    IPC分类号： B62M6/00 ,  H02J7/00

    CPC分类号： H02J7/0016 ,  B60L50/53 ,  B60L58/40 ,  B60L2200/12 ,  B62M6/40 ,  Y02T10/7011 ,  Y02T10/7055 ,  Y02T90/34

    摘要： Electric power supply unit and method for charging accumulators of an electric power supply unit and light electric vehicle with electric power supply unitAccording to the invention an electric drive system is provided for a vehicle. In it is provided a fuel cell for generating a first voltage. Connected to this first voltage is a series connection of accumulators with at least one first accumulator and one second accumulator. A transformer comprises a magnetisable core, wherein the term magnetisable is understood to mean that the magnetic field strength of the core can be changed. In addition, the transformer comprises a primary coil, a first secondary coil and a second secondary coil. The first primary coil can be connected switchably to the first voltage. A first secondary switch is provided to connect the first secondary coil in parallel to the first accumulator. The electric drive system also comprises a second secondary switch for connecting the secondary coil in parallel to the second accumulator. The first secondary switch and the second secondary switch can be switched independently of one another.

    摘要翻译： 电力供给单元和电力供给单元的蓄电池的充电方法以及具有电力供给单元的轻型电动汽车的充电方法根据本发明，为车辆提供电力驱动系统。 在其中提供了用于产生第一电压的燃料电池。 连接到该第一电压是具有至少一个第一累加器和一个第二累加器的累加器的串联连接。 变压器包括可磁化芯，其中术语可磁化被理解为意味着可以改变磁芯的磁场强度。 此外，变压器包括初级线圈，第一次级线圈和第二次级线圈。 第一个初级线圈可以切换到第一个电压。 提供第一次级开关以将第一次级线圈并联连接到第一蓄电池。 电驱动系统还包括用于将次级线圈并联连接到第二蓄电池的第二辅助开关。 第一次开关和第二次开关可彼此独立地切换。

    WRITE-ERASE ENDURANCE LIFETIME OF MEMORY STORAGE DEVICES
    89.
    发明申请
    WRITE-ERASE ENDURANCE LIFETIME OF MEMORY STORAGE DEVICES 有权
    内存存储设备的写保护寿命寿命

    公开(公告)号：US20110029715A1

    公开(公告)日：2011-02-03

    申请号：US12511577

    申请日：2009-07-29

    申请人： Xiao-yu Hu ,  Evangelos S. Eleftheriou ,  Robert Haas

    发明人： Xiao-yu Hu ,  Evangelos S. Eleftheriou ,  Robert Haas

    IPC分类号： G06F12/02 ,  G06F12/00

    CPC分类号： B62D35/001 ,  G06F12/0246 ,  G06F2212/1044 ,  G06F2212/7205 ,  G06F2212/7211 ,  G11C16/349 ,  G11C16/3495

    摘要： A memory management system and method for managing memory blocks of a memory device of a computer. The system includes a free block data structure including free memory blocks for writing, and sorting the free memory blocks in a predetermined order based on block write-erase endurance cycle count and receiving new user-write requests to update existing data and relocation write requests to relocate existing data separately, a user-write block pool for receiving youngest blocks holding user-write data (i.e., any page being updated frequently) from the free block data structure, a relocation block pool for receiving oldest blocks holding relocation data (i.e., any page being updated infrequently) from the free block data structure, and a garbage collection pool structure for selecting at least one of user-write blocks and relocation blocks for garbage collection, wherein the selected block is moved back to the free block data structure upon being relocated and erased.

    摘要翻译： 一种用于管理计算机的存储器件的存储器块的存储器管理系统和方法。 该系统包括一个空闲块数据结构，包括用于写入的空闲存储器块，并且基于块写擦除耐久循环计数以预定顺序对可用存储器块进行排序，并且接收新的用户写入请求以更新现有数据和重定位写请求 重新定位现有数据，用于从空闲块数据结构接收持有用户写入数据（即，任何频繁更新的页面）的最小块的用户写入块池，用于接收保存重定位数据的最旧块的重定位块池（即， 任何不经常更新的页面）以及用于选择用于垃圾回收的用户写入块和重定位块中的至少一个的垃圾收集池结构，其中所选择的块被移动回到空闲块数据结构 被搬迁和删除。

    MEMORY MANAGEMENT IN A NON-VOLATILE SOLID STATE MEMORY DEVICE
    90.
    发明申请
    MEMORY MANAGEMENT IN A NON-VOLATILE SOLID STATE MEMORY DEVICE 有权
    非易失性固态存储器件中的存储器管理

    公开(公告)号：US20110022931A1

    公开(公告)日：2011-01-27

    申请号：US12835783

    申请日：2010-07-14

    申请人： Evangelos S. Eleftheriou ,  Ilias Iliadis ,  Robert Haas ,  Xiaoyu Hu

    发明人： Evangelos S. Eleftheriou ,  Ilias Iliadis ,  Robert Haas ,  Xiaoyu Hu

    IPC分类号： H03M13/05 ,  G06F11/10

    CPC分类号： G06F11/1068 ,  G11C16/349 ,  G11C16/3495

    摘要： A computer-implemented method of managing a memory of a non-volatile solid state memory device by balancing write/erase cycles among blocks to level block usage. The method includes: monitoring an occurrence of an error during a read operation in a memory unit of the device, wherein the error is correctable by error-correcting code; and programming the memory unit according to the monitored occurrence of the error; wherein the step of monitoring the occurrence of an error is carried out for at least one block; and wherein said step of programming comprises wear-leveling the monitored block according the error monitored for the monitored block. A computer system and a computer program-product is also provided.The non-volatile solid state memory device includes: a memory unit having data stored therein; and a controller with a logic for programming the memory unit according to a monitored occurrence of an error during a read operation. The method includes: monitoring an occurrence of an error during a read operation in a memory unit of the device; and programming the memory unit according to the monitored occurrence of the error.

    摘要翻译： 一种计算机实现的通过平衡块之间的写入/擦除循环来平衡块使用来管理非易失性固态存储器件的存储器的方法。 该方法包括：在设备的存储器单元中的读取操作期间监视错误的发生，其中可通过纠错码校正错误; 并根据所监视的错误发生来对存储器单元进行编程; 其中，针对至少一个块执行监视错误发生的步骤; 并且其中所述编程步骤包括根据所监视的块监测的误差来磨损所监视的块。 还提供了计算机系统和计算机程序产品。 非易失性固态存储装置包括：具有存储在其中的数据的存储单元; 以及控制器，具有用于根据在读取操作期间监视的错误发生来对存储器单元进行编程的逻辑。 该方法包括：在设备的存储器单元中的读取操作期间监视错误的发生; 并根据监视出现的错误对存储器单元进行编程。